Searched refs:PLL_FBDIV_MASK (Results 1 – 12 of 12) sorted by relevance
/openbmc/u-boot/arch/arm/include/asm/arch-armada100/ |
H A D | utmi-armada100.h | 22 #define PLL_FBDIV_MASK 0x00000FF0 macro
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/openbmc/u-boot/drivers/usb/host/ |
H A D | utmi-armada100.c | 28 clrbits_le32(&phy_regs->utmi_pll, PLL_FBDIV_MASK | PLL_REFDIV_MASK); in utmi_phy_init()
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/openbmc/linux/drivers/phy/marvell/ |
H A D | phy-mvebu-cp110-utmi.c | 39 #define PLL_FBDIV_MASK GENMASK(24, 16) macro 122 reg &= ~(PLL_REFDIV_MASK | PLL_FBDIV_MASK | PLL_SEL_LPFR_MASK); in mvebu_cp110_utmi_port_setup()
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/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/ |
H A D | cru_rk3036.h | 73 PLL_FBDIV_MASK = 0xfff, enumerator
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H A D | cru_rk322x.h | 75 PLL_FBDIV_MASK = 0xfff, enumerator
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H A D | cru_rk3128.h | 76 PLL_FBDIV_MASK = 0xfff, enumerator
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/openbmc/u-boot/drivers/clk/rockchip/ |
H A D | clk_rk3036.c | 65 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkclk_set_pll() 199 fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT; in rkclk_pll_get_rate()
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H A D | clk_rk322x.c | 63 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkclk_set_pll() 200 fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT; in rkclk_pll_get_rate()
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H A D | clk_rk3128.c | 60 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkclk_set_pll() 267 fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT; in rkclk_pll_get_rate()
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H A D | clk_rk3328.c | 53 PLL_FBDIV_MASK = 0xfff, enumerator 263 PLL_FBDIV_MASK | PLL_POSTDIV1_MASK, in rkclk_set_pll()
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H A D | clk_rk3399.c | 71 PLL_FBDIV_MASK = 0xfff, enumerator 339 rk_clrsetreg(&pll_con[0], PLL_FBDIV_MASK, in rkclk_set_pll()
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/openbmc/u-boot/arch/arm/mach-rockchip/rk3036/ |
H A D | sdram_rk3036.c | 339 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkdclk_init()
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