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Searched refs:PLLX_BASE (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra20.c58 #define PLLX_BASE 0xe0 macro
389 .base_reg = PLLX_BASE,
944 readl(clk_base + PLLX_BASE); in tegra20_cpu_clock_suspend()
969 base = readl_relaxed(clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()
977 clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()
H A Dclk-tegra-super-gen4.c17 #define PLLX_BASE 0xe0 macro
H A Dclk-tegra114.c61 #define PLLX_BASE 0xe0 macro
501 .base_reg = PLLX_BASE,
H A Dclk-tegra30.c63 #define PLLX_BASE 0xe0 macro
496 .base_reg = PLLX_BASE,
H A Dclk-tegra124.c54 #define PLLX_BASE 0xe0 macro
188 .base_reg = PLLX_BASE,
H A Dclk-tegra210.c78 #define PLLX_BASE 0xe0 macro
1660 .base_reg = PLLX_BASE,