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Searched refs:PLLE_SS_CNTL_SSCINVERT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c935 #define PLLE_SS_CNTL_SSCINVERT (1 << 15) macro
1012 value &= ~PLLE_SS_CNTL_SSCINVERT; in tegra_plle_enable()
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1121 #define PLLE_SS_CNTL_SSCINVERT (1 << 15) macro
1226 value &= ~PLLE_SS_CNTL_SSCINVERT; in tegra_plle_enable()