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Searched refs:PLLE_MISC_LOCK_ENABLE (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c640 #define PLLE_MISC_LOCK_ENABLE (1 << 9) macro
690 value &= ~PLLE_MISC_LOCK_ENABLE; in tegra_plle_enable()
706 value |= PLLE_MISC_LOCK_ENABLE; in tegra_plle_enable()
/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c669 #define PLLE_MISC_LOCK_ENABLE (1 << 9) macro
719 value &= ~PLLE_MISC_LOCK_ENABLE; in tegra_plle_enable()
752 value |= PLLE_MISC_LOCK_ENABLE; in tegra_plle_enable()
/openbmc/linux/drivers/clk/tegra/
H A Dclk-pll.c61 #define PLLE_MISC_LOCK_ENABLE BIT(9) macro
974 val &= ~(PLLE_MISC_LOCK_ENABLE | PLLE_MISC_SETUP_MASK); in clk_plle_enable()
999 val |= PLLE_MISC_LOCK_ENABLE; in clk_plle_enable()
1637 val |= PLLE_MISC_LOCK_ENABLE; in clk_plle_tegra114_enable()
2477 val |= PLLE_MISC_LOCK_ENABLE; in clk_plle_tegra210_enable()
H A Dclk-tegra20.c68 #define PLLE_MISC_LOCK_ENABLE 9 macro
410 .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
H A Dclk-tegra114.c81 #define PLLE_MISC_LOCK_ENABLE 9 macro
565 .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
H A Dclk-tegra30.c78 #define PLLE_MISC_LOCK_ENABLE 9 macro
518 .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
H A Dclk-tegra124.c81 #define PLLE_MISC_LOCK_ENABLE 9 macro
481 .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
H A Dclk-tegra210.c131 #define PLLE_MISC_LOCK_ENABLE 9 macro
1975 .lock_enable_bit_idx = PLLE_MISC_LOCK_ENABLE,
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c952 #define PLLE_MISC_LOCK_ENABLE (1 << 9) macro
980 value |= PLLE_MISC_LOCK_ENABLE; in tegra_plle_enable()