Searched refs:PLLE_AUX_SEQ_ENABLE (Results 1 – 4 of 4) sorted by relevance
98 #define PLLE_AUX_SEQ_ENABLE BIT(24) macro1632 val &= ~PLLE_AUX_SEQ_ENABLE; in clk_plle_tegra114_enable()1687 val |= PLLE_AUX_SEQ_ENABLE; in clk_plle_tegra114_enable()2469 if (val & PLLE_AUX_SEQ_ENABLE) in clk_plle_tegra210_enable()2538 if (val & PLLE_AUX_SEQ_ENABLE) in clk_plle_tegra210_disable()
412 #define PLLE_AUX_SEQ_ENABLE (1 << 24) macro505 if (value & PLLE_AUX_SEQ_ENABLE) in tegra210_plle_hw_sequence_is_enabled()534 value |= PLLE_AUX_SEQ_ENABLE; in tegra210_plle_hw_sequence_start()
958 #define PLLE_AUX_SEQ_ENABLE (1 << 24) macro972 value &= ~PLLE_AUX_SEQ_ENABLE; in tegra_plle_enable()
1146 #define PLLE_AUX_SEQ_ENABLE (1 << 24) macro1254 value |= PLLE_AUX_SEQ_ENABLE; in tegra_plle_enable()