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Searched refs:PLL5 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/mips/
H A Dmscc.txt48 configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-msm8660.h258 #define PLL5 249 macro
H A Dqcom,gcc-mdm9615.h291 #define PLL5 281 macro
H A Dqcom,gcc-msm8960.h289 #define PLL5 281 macro
/openbmc/u-boot/doc/
H A DREADME.Heterogeneous-SoCs55 PLL5, PLL3 is Reserved(as mentioned in RM), so this define contains the