Searched refs:PHY_1ch (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/cmd/aspeed/nettest/ |
| H A D | phy.c | 632 eng->phy.PHY_1ch = phy_read( eng, 28 ); in phy_marvell3()
634 if ( ( eng->phy.PHY_1ch & 0x0c00 ) != 0x0000 ) { in phy_marvell3()
635 …g] Register 28, bit 10~11 must be 0 (RGMIIRX Edge-align Mode)[Reg1ch:%04x]\n\n", eng->phy.PHY_1ch); in phy_marvell3()
636 eng->phy.PHY_1ch = ( eng->phy.PHY_1ch & 0xf3ff ) | 0x0000; in phy_marvell3()
637 phy_write( eng, 28, eng->phy.PHY_1ch ); in phy_marvell3()
640 if ( ( eng->phy.PHY_1ch & 0x0c00 ) != 0x0800 ) { in phy_marvell3()
641 …f("\n\n[Warning] Register 28, bit 10~11 must be 2 (RMII Mode)[Reg1ch:%04x]\n\n", eng->phy.PHY_1ch); in phy_marvell3()
642 eng->phy.PHY_1ch = ( eng->phy.PHY_1ch & 0xf3ff ) | 0x0800; in phy_marvell3()
643 phy_write( eng, 28, eng->phy.PHY_1ch ); in phy_marvell3()
742 eng->phy.PHY_1ch = phy_read(eng, 0x1c); in phy_broadcom0()
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| H A D | comminf.h | 548 uint32_t PHY_1ch ; member
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