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Searched refs:PHYCLK_USBDRD300_UDRD30_PHYCLK_USER (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos7-clk.h137 #define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER 7 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dexynos7420-clk.h140 #define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER 7 macro
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7.c955 GATE(PHYCLK_USBDRD300_UDRD30_PHYCLK_USER,
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi685 <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER>,