Searched refs:PERIPH_CLK_WD (Results 1 – 3 of 3) sorted by relevance
115 #define PERIPH_CLK_WD 7 macro
214 GATE(PERIPH_CLK_WD, "wd", "wd_div", 0x100, 7),
748 clocks = <&clk_periph PERIPH_CLK_WD>, <&cr_periph SYS_CLK_WD>;