| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | samsung,s3c64xx-clock.h | 84 #define PCLK_WDT 69 macro
|
| H A D | rk3036-cru.h | 77 #define PCLK_WDT 368 macro
|
| H A D | exynos7-clk.h | 125 #define PCLK_WDT 3 macro
|
| H A D | rk3188-cru-common.h | 83 #define PCLK_WDT 331 macro
|
| H A D | rk3128-cru.h | 92 #define PCLK_WDT 319 macro
|
| H A D | rv1108-cru.h | 135 #define PCLK_WDT 284 macro
|
| H A D | rk3368-cru.h | 150 #define PCLK_WDT 368 macro
|
| H A D | rk3308-cru.h | 193 #define PCLK_WDT 214 macro
|
| H A D | rk3328-cru.h | 167 #define PCLK_WDT 236 macro
|
| H A D | rk3288-cru.h | 160 #define PCLK_WDT 368 macro
|
| H A D | rockchip,rv1126-cru.h | 310 #define PCLK_WDT 248 macro
|
| H A D | rk3399-cru.h | 275 #define PCLK_WDT 380 macro
|
| H A D | rockchip,rk3588-cru.h | 233 #define PCLK_WDT 218 macro
|
| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 78 #define PCLK_WDT 368 macro
|
| H A D | rk3128-cru.h | 81 #define PCLK_WDT 368 macro
|
| H A D | exynos7420-clk.h | 128 #define PCLK_WDT 3 macro
|
| H A D | rk3188-cru-common.h | 81 #define PCLK_WDT 331 macro
|
| H A D | rk3368-cru.h | 153 #define PCLK_WDT 368 macro
|
| H A D | rv1108-cru.h | 138 #define PCLK_WDT 284 macro
|
| H A D | rk3288-cru.h | 155 #define PCLK_WDT 368 macro
|
| H A D | rk3399-cru.h | 273 #define PCLK_WDT 380 macro
|
| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-s3c64xx.c | 240 GATE_BUS(PCLK_WDT, "pclk_wdt", "pclk", PCLK_GATE, 5),
345 ALIAS(PCLK_WDT, NULL, "watchdog"),
|
| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | s3c64xx.dtsi | 101 clocks = <&clocks PCLK_WDT>;
|
| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rk3036.c | 416 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3xxx.dtsi | 292 clocks = <&cru PCLK_WDT>;
|