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Searched refs:PCI_NUM_PINS (Results 1 – 20 of 20) sorted by relevance

/openbmc/qemu/hw/pci-host/
H A Draven.c64 qemu_irq pci_irqs[PCI_NUM_PINS];
247 for (i = 0; i < PCI_NUM_PINS; i++) { in raven_pcihost_realizefn()
254 object_property_set_int(OBJECT(s->or_irq), "num-lines", PCI_NUM_PINS, in raven_pcihost_realizefn()
259 for (i = 0; i < PCI_NUM_PINS; i++) { in raven_pcihost_realizefn()
266 pci_bus_irqs(&s->pci_bus, raven_set_irq, s, PCI_NUM_PINS); in raven_pcihost_realizefn()
H A Dgpex-acpi.c17 Aml *rt_pkg = aml_varpackage(PCI_SLOT_MAX * PCI_NUM_PINS); in acpi_dsdt_add_pci_route_table()
19 for (i = 0; i < PCI_NUM_PINS; i++) { in acpi_dsdt_add_pci_route_table()
20 int gsi = (i + slot_no) % PCI_NUM_PINS; in acpi_dsdt_add_pci_route_table()
32 for (i = 0; i < PCI_NUM_PINS; i++) { in acpi_dsdt_add_pci_route_table()
H A Dsh_pci.c43 qemu_irq irq[PCI_NUM_PINS];
134 PCI_DEVFN(0, 0), PCI_NUM_PINS, in sh_pcic_host_realize()
H A Dppce500.c102 qemu_irq irq[PCI_NUM_PINS];
103 uint32_t irq_num[PCI_NUM_PINS];
456 for (i = 0; i < PCI_NUM_PINS; i++) { in e500_pcihost_realize()
H A Darticia.c39 qemu_irq irq[PCI_NUM_PINS];
H A Daspeed_pcie.c158 assert(irq < PCI_NUM_PINS); in aspeed_pcie_rc_set_irq()
171 return irq_num % PCI_NUM_PINS; in aspeed_pcie_rc_map_irq()
H A Dversatile.c265 slot %= PCI_NUM_PINS; in pci_vpb_broken_irq()
H A Dmv64361.c65 qemu_irq irq[PCI_NUM_PINS];
/openbmc/qemu/hw/ppc/
H A Dpegasos2.c80 IRQState pci_irqs[PCI_NUM_PINS];
81 OrIRQState orirq[PCI_NUM_PINS];
82 qemu_irq mv_pirq[PCI_NUM_PINS];
83 qemu_irq via_pirq[PCI_NUM_PINS];
180 for (i = 0; i < PCI_NUM_PINS; i++) { in pegasos2_init()
195 for (i = 0; i < PCI_NUM_PINS; i++) { in pegasos2_init()
222 for (i = 0; i < PCI_NUM_PINS; i++) { in pegasos2_init()
H A Damigaone.c159 for (i = 0; i < PCI_NUM_PINS; i++) { in amigaone_init()
H A Dspapr_pci.c1747 for (i = PCI_NUM_PINS - 1; i >= 0; i--) { in spapr_phb_unrealize()
1888 PCI_DEVFN(0, 0), PCI_NUM_PINS, in spapr_phb_realize()
1943 for (i = 0; i < PCI_NUM_PINS; i++) { in spapr_phb_realize()
1944 int irq = SPAPR_IRQ_PCI_LSI + sphb->index * PCI_NUM_PINS + i; in spapr_phb_realize()
2146 VMSTATE_STRUCT_ARRAY(lsi_table, SpaprPhbState, PCI_NUM_PINS, 0,
2264 uint32_t interrupt_map[PCI_SLOT_MAX * PCI_NUM_PINS][7]; in spapr_dt_phb()
2315 for (j = 0; j < PCI_NUM_PINS; j++) { in spapr_dt_phb()
2316 uint32_t *irqmap = interrupt_map[i*PCI_NUM_PINS + j]; in spapr_dt_phb()
H A De500.c927 unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4}; in ppce500_init()
1068 for (i = 0; i < PCI_NUM_PINS; i++) { in ppce500_init()
/openbmc/qemu/hw/isa/
H A Dlpc_ich9.c66 static void ich9_cc_update_ir(uint8_t irr[PCI_NUM_PINS], uint16_t ir) in ich9_cc_update_ir() argument
69 for (intx = 0; intx < PCI_NUM_PINS; intx++) { in ich9_cc_update_ir()
105 for (pci_intx = 0; pci_intx < PCI_NUM_PINS; pci_intx++) { in ich9_cc_update()
125 for (intx = 0; intx < PCI_NUM_PINS; intx++) { in ich9_cc_init()
H A Dvt82c686.c724 qdev_init_gpio_in_named(dev, via_isa_pirq, "pirq", PCI_NUM_PINS); in via_isa_realize()
/openbmc/qemu/include/hw/pci-host/
H A Dspapr.h68 SpaprPciLsi lsi_table[PCI_NUM_PINS];
/openbmc/qemu/include/hw/southbridge/
H A Dich9.h32 uint8_t irr[PCI_SLOT_MAX][PCI_NUM_PINS];
/openbmc/qemu/hw/pci/
H A Dpci.c361 for (i = 0; i < PCI_NUM_PINS; ++i) { in pci_device_deassert_intx()
707 uint32_t irq_state[PCI_NUM_PINS]; in get_pci_irq_state()
709 for (i = 0; i < PCI_NUM_PINS; ++i) { in get_pci_irq_state()
718 for (i = 0; i < PCI_NUM_PINS; ++i) { in get_pci_irq_state()
731 for (i = 0; i < PCI_NUM_PINS; ++i) { in put_pci_irq_state()
770 PCI_NUM_PINS * sizeof(int32_t)),
1592 for (i = 0; i < PCI_NUM_PINS; ++i) { in pci_update_irq_disabled()
1654 assert(0 <= irq_num && irq_num < PCI_NUM_PINS); in pci_irq_handler()
1670 assert(0 <= intx && intx < PCI_NUM_PINS); in pci_allocate_irq()
/openbmc/qemu/include/hw/pci/
H A Dpci.h183 #define PCI_NUM_PINS 4 /* A-D */ macro
303 return (slot + pin) % PCI_NUM_PINS; in pci_swizzle()
/openbmc/qemu/hw/mips/
H A Dmalta.c624 static const char pci_pins_cfg[PCI_NUM_PINS] = { in bl_setup_gt64120_jump_kernel()
/openbmc/qemu/hw/arm/
H A Dvirt.c1383 int irq_nr = first_irq + ((pin + PCI_SLOT(devfn)) % PCI_NUM_PINS); in create_pcie_irq_map()