Searched refs:PCI_MSI_FLAGS_MASKBIT (Results 1 – 12 of 12) sorted by relevance
60 switch (flags & (PCI_MSI_FLAGS_MASKBIT | PCI_MSI_FLAGS_64BIT)) { in msi_cap_sizeof()61 case PCI_MSI_FLAGS_MASKBIT | PCI_MSI_FLAGS_64BIT: in msi_cap_sizeof()65 case PCI_MSI_FLAGS_MASKBIT: in msi_cap_sizeof()223 flags |= PCI_MSI_FLAGS_MASKBIT; in msi_init()293 if (flags & PCI_MSI_FLAGS_MASKBIT) { in msi_reset()307 if (!(flags & PCI_MSI_FLAGS_MASKBIT)) { in msi_is_masked()362 assert(flags & PCI_MSI_FLAGS_MASKBIT); in msi_notify()388 bool msi_per_vector_mask = flags & PCI_MSI_FLAGS_MASKBIT; in msi_write_config()412 if (flags & PCI_MSI_FLAGS_MASKBIT) { in msi_write_config()
37 #define IOH_EP_MSI_SUPPORTED_FLAGS PCI_MSI_FLAGS_MASKBIT71 IOH_EP_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, in ioh3420_interrupts_init()
34 #define CXL_RP_MSI_SUPPORTED_FLAGS PCI_MSI_FLAGS_MASKBIT84 CXL_RP_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, in cxl_rp_interrupts_init()
67 XIO3130_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, in xio3130_upstream_realize()
77 XIO3130_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, in xio3130_downstream_realize()
293 control |= PCI_MSI_FLAGS_MASKBIT; in msi_setup_msi_desc()296 control &= ~PCI_MSI_FLAGS_MASKBIT; in msi_setup_msi_desc()300 desc.pci.msi_attrib.can_mask = !!(control & PCI_MSI_FLAGS_MASKBIT); in msi_setup_msi_desc()
1215 if (flags & PCI_MSI_FLAGS_MASKBIT) { in init_pci_cap_msi_perm()1221 if (flags & PCI_MSI_FLAGS_MASKBIT) { in init_pci_cap_msi_perm()1243 if (flags & PCI_MSI_FLAGS_MASKBIT) in vfio_msi_cap_len()
1194 if (!(flags & PCI_MSI_FLAGS_MASKBIT)) { in xen_pt_mask_reg_init()1213 if (!(flags & PCI_MSI_FLAGS_MASKBIT)) { in xen_pt_pending_reg_init()1681 if (msg_ctrl & PCI_MSI_FLAGS_MASKBIT) { in xen_pt_msi_size_init()
311 #define PCI_MSI_FLAGS_MASKBIT 0x0100 /* Per-vector masking capable */ macro
312 #define PCI_MSI_FLAGS_MASKBIT 0x0100 /* Per-vector masking capable */ macro
241 flags &= ~PCI_MSI_FLAGS_MASKBIT; in cdns_pcie_ep_set_msi()
1355 msi_maskbit = !!(ctrl & PCI_MSI_FLAGS_MASKBIT); in vfio_msi_setup()