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Searched refs:PBS_RX_PHY_REG (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_centralization.c627 PBS_RX_PHY_REG(effective_cs, pad_num), in ddr3_tip_special_rx()
637 PBS_RX_PHY_REG(effective_cs, pad_num), in ddr3_tip_special_rx()
651 PBS_RX_PHY_REG(effective_cs, 4), in ddr3_tip_special_rx()
658 PBS_RX_PHY_REG(effective_cs, 4), in ddr3_tip_special_rx()
664 PBS_RX_PHY_REG(effective_cs, 5), in ddr3_tip_special_rx()
671 PBS_RX_PHY_REG(effective_cs, 5), in ddr3_tip_special_rx()
H A Dddr3_training_pbs.c776 PBS_RX_PHY_REG(effective_cs, 0) : in ddr3_tip_pbs()
944 PBS_RX_PHY_REG(cs_num, 0) : in ddr3_tip_print_pbs_result()
994 PBS_RX_PHY_REG(effective_cs, 0) : in ddr3_tip_clean_pbs_result()
H A Dmv_ddr_regs.h455 #define PBS_RX_PHY_REG(cs, bit) (PBS_RX_PHY_BASE + (cs) * 0x10 + (bit)) macro
H A Dddr3_training.c1919 PBS_RX_PHY_REG(effective_cs, DQSP_PAD), 0)); in ddr3_tip_ddr3_reset_phy_regs()
1927 PBS_RX_PHY_REG(effective_cs, DQSN_PAD), 0)); in ddr3_tip_ddr3_reset_phy_regs()