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Searched refs:P4_ESCR_MSR_BASE (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/arch/x86/events/intel/
H A Dp4.c1157 #define P4_ESCR_MSR_BASE 0x000003a0 macro
1159 #define P4_ESCR_MSR_TABLE_SIZE (P4_ESCR_MSR_MAX - P4_ESCR_MSR_BASE + 1)
1160 #define P4_ESCR_MSR_IDX(msr) (msr - P4_ESCR_MSR_BASE)