Searched refs:ODM_MEM_PWR_CTRL3 (Results 1 – 10 of 10) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_hwseq.h | 415 SR(ODM_MEM_PWR_CTRL3), \ 680 uint32_t ODM_MEM_PWR_CTRL3; member 928 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_UNASSIGNED_PWR_MODE, mask_sh), \ 929 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_VBLANK_PWR_MODE, mask_sh), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/ |
H A D | dcn316_resource.c | 677 SR(ODM_MEM_PWR_CTRL3), \ 763 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_UNASSIGNED_PWR_MODE, mask_sh), \ 764 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_VBLANK_PWR_MODE, mask_sh), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/ |
H A D | dcn315_resource.c | 680 SR(ODM_MEM_PWR_CTRL3), \ 766 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_UNASSIGNED_PWR_MODE, mask_sh), \ 767 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_VBLANK_PWR_MODE, mask_sh), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_resource.c | 687 SR(ODM_MEM_PWR_CTRL3), \ 778 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_UNASSIGNED_PWR_MODE, mask_sh), \ 779 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_VBLANK_PWR_MODE, mask_sh), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/ |
H A D | dcn321_resource.c | 528 SR(ODM_MEM_PWR_CTRL3), \ 616 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_UNASSIGNED_PWR_MODE, mask_sh), \ 617 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_VBLANK_PWR_MODE, mask_sh), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_resource.c | 681 SR(ODM_MEM_PWR_CTRL3), \ 767 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_UNASSIGNED_PWR_MODE, mask_sh), \ 768 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_VBLANK_PWR_MODE, mask_sh), \
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H A D | dcn31_hwseq.c | 83 REG_SET_2(ODM_MEM_PWR_CTRL3, 0, ODM_MEM_UNASSIGNED_PWR_MODE, 3, ODM_MEM_VBLANK_PWR_MODE, 1); in enable_memory_low_power()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_resource.c | 529 SR(ODM_MEM_PWR_CTRL3), \ 617 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_UNASSIGNED_PWR_MODE, mask_sh), \ 618 HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_VBLANK_PWR_MODE, mask_sh), \
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H A D | dcn32_hwseq.c | 789 REG_SET_2(ODM_MEM_PWR_CTRL3, 0, ODM_MEM_UNASSIGNED_PWR_MODE, 3, ODM_MEM_VBLANK_PWR_MODE, 1); in dcn32_init_hw()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_hwseq.c | 465 REG_SET_2(ODM_MEM_PWR_CTRL3, 0, ODM_MEM_UNASSIGNED_PWR_MODE, 3, ODM_MEM_VBLANK_PWR_MODE, 1); in dcn30_init_hw()
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