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Searched refs:NV03_PFIFO_CACHE1_PUSH0 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv04.c59 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, 0); in nv04_chan_stop()
81 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, 1); in nv04_chan_stop()
341 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, in nv04_fifo_intr_cache_error()
342 nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH0) & ~1); in nv04_fifo_intr_cache_error()
344 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, in nv04_fifo_intr_cache_error()
345 nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH0) | 1); in nv04_fifo_intr_cache_error()
488 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, 1); in nv04_fifo_init()
H A Dregsnv04.h35 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 macro
H A Dnv17.c116 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, 1); in nv17_fifo_init()
H A Dnv40.c226 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH0, 1); in nv40_fifo_init()
/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_reg.h471 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 macro