Searched refs:NDCB0 (Results 1 – 3 of 3) sorted by relevance
| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | pxa3xx_nand.c | 48 #define NDCB0 (0x48) /* Command Buffer0 */ macro
744 nand_writel(info, NDCB0, info->ndcb0); in pxa3xx_nand_irq()
745 nand_writel(info, NDCB0, info->ndcb1); in pxa3xx_nand_irq()
746 nand_writel(info, NDCB0, info->ndcb2); in pxa3xx_nand_irq()
750 nand_writel(info, NDCB0, info->ndcb3); in pxa3xx_nand_irq()
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| /openbmc/linux/drivers/mtd/nand/raw/ |
| H A D | marvell_nand.c | 185 #define NDCB0 0x48 macro
651 nfc->regs + NDCB0); in marvell_nfc_send_cmd()
652 writel_relaxed(nfc_op->ndcb[1], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
653 writel(nfc_op->ndcb[2], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
662 writel(nfc_op->ndcb[3], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
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| /openbmc/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2344 #define NDCB0 0x43100048 /* Data Controller Command Buffer0 */ macro
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