Searched refs:MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 (Results 1 – 6 of 6) sorted by relevance
261 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19
409 #define MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x1A0 0x408 0x000 0x5 0… macro
592 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x40000000
764 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x40000041 /* LTE_RST# */
979 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x140
1118 <MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x6>; /* SODIMM 150 */