Searched refs:MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 (Results 1 – 10 of 10) sorted by relevance
22 #define MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x001C 0x0060 0x0000 0x5 0x0 macro
497 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x14 /* SODIMM 131 USBH OC */
20 #define MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x001C 0x0060 0x0000 0x5 0x0 macro
17 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
24 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
445 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x00020
341 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x17059
622 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0xb1 /* SMSC PHY Int */
705 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x130a0
720 MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 / USBH_OC */