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Searched refs:MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/arch/arm/dts/
H A Dimx6ull-pinfunc-snvs.h18 #define MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000C 0x0050 0x0000 0x5 0x0 macro
H A Dimx6ull-colibri.dts534 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130b0
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ull-pinfunc-snvs.h16 #define MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000C 0x0050 0x0000 0x5 0x0 macro
H A Dimx6ull-phytec-segin.dtsi28 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
H A Dimx6ull-opos6uldev.dts39 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
H A Dimx6ull-dhcor-maveo-box.dts337 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x400120b0 /* PSOC_SWD_CLK */
H A Dimx6ull-jozacp.dts450 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17000
H A Dimx6ull-phytec-tauri.dtsi317 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
H A Dimx6ull-dhcom-som.dtsi593 fsl,pins = <MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x400120b0>;
H A Dimx6ull-tarragon-common.dtsi724 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x100a0
H A Dimx6ull-colibri.dtsi751 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 / WAKE_UP */