Searched refs:MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 (Results 1 – 12 of 12) sorted by relevance
34 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x1b0b0
42 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x1b0b0
51 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x1b0b0
20 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x0f0b0 /* GPIO5_IO31 (Wifi Power Enable) */
381 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x1b0b0
820 #define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x28c 0x65c 0x000 0x5 0x0 macro
384 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x4001b0b5 /* PICO_P44 */
235 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x1b0b1 /* DIO_6 */
37 #define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x058 0x36c 0x000 0x5 0x0 macro
273 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x100b1 /* FPGA_SPI_CS0 */
823 #define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x28c 0x65c 0x000 0x5 0x0 macro
41 #define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x058 0x36c 0x000 0x5 0x0 macro