1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*724ba675SRob Herring//
3*724ba675SRob Herring// Copyright 2017 NXP
4*724ba675SRob Herring
5*724ba675SRob Herring#include "imx6qdl-pico.dtsi"
6*724ba675SRob Herring
7*724ba675SRob Herring/ {
8*724ba675SRob Herring	leds {
9*724ba675SRob Herring		compatible = "gpio-leds";
10*724ba675SRob Herring		pinctrl-names = "default";
11*724ba675SRob Herring		pinctrl-0 = <&pinctrl_gpio_leds>;
12*724ba675SRob Herring
13*724ba675SRob Herring		led {
14*724ba675SRob Herring			label = "gpio-led";
15*724ba675SRob Herring			gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
16*724ba675SRob Herring		};
17*724ba675SRob Herring	};
18*724ba675SRob Herring
19*724ba675SRob Herring};
20*724ba675SRob Herring
21*724ba675SRob Herring&i2c2 {
22*724ba675SRob Herring	status = "okay";
23*724ba675SRob Herring
24*724ba675SRob Herring	adc081c: adc@50 {
25*724ba675SRob Herring		compatible = "ti,adc081c";
26*724ba675SRob Herring		reg = <0x50>;
27*724ba675SRob Herring		vref-supply = <&reg_3p3v>;
28*724ba675SRob Herring	};
29*724ba675SRob Herring};
30*724ba675SRob Herring
31*724ba675SRob Herring&iomuxc {
32*724ba675SRob Herring	pinctrl_gpio_leds: gpioledsgrp {
33*724ba675SRob Herring		fsl,pins = <
34*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x1b0b0
35*724ba675SRob Herring		>;
36*724ba675SRob Herring	};
37*724ba675SRob Herring};
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