Searched refs:MUX_MPLL_SEL (Results 1 – 2 of 2) sorted by relevance
197 MUX_DPHY_SEL(1) | MUX_MPLL_SEL(1) | in board_clock_init()201 MUX_MPLL_SEL(0) | MUX_PWI_SEL(0) | MUX_G2D_ACP0_SEL(1) | in board_clock_init()221 MUX_MPLL_SEL(1) | MUX_PWI_SEL(8) | MUX_G2D_ACP0_SEL(0) | in board_clock_init()
84 #define MUX_MPLL_SEL(x) (((x) & 0x1) << 12) macro