Searched refs:MUX_MODE10 (Results 1 – 6 of 6) sorted by relevance
/openbmc/u-boot/arch/arm/dts/ |
H A D | am57xx-sbc-am57x.dts | 54 DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT| MUX_MODE10) /* mcasp1_axr0.i2c5_sda */ 55 DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT| MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
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H A D | am57xx-cl-som-am57x.dts | 98 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */ 99 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */ 105 DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */ 106 DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am57xx-sbc-am57x.dts | 51 DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT| MUX_MODE10) /* mcasp1_axr0.i2c5_sda */ 52 DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT| MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
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H A D | am57xx-cl-som-am57x.dts | 95 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */ 96 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */ 102 DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */ 103 DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */
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/openbmc/linux/include/dt-bindings/pinctrl/ |
H A D | dra.h | 23 #define MUX_MODE10 0xa macro
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/openbmc/u-boot/include/dt-bindings/pinctrl/ |
H A D | dra.h | 26 #define MUX_MODE10 0xa macro
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