Searched refs:MSR_P6_EVNTSEL0 (Results 1 – 11 of 11) sorted by relevance
| /openbmc/linux/arch/x86/events/intel/ |
| H A D | p6.c | 143 rdmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_disable_all()
145 wrmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_disable_all()
153 rdmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_enable_all()
155 wrmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_enable_all()
210 .eventsel = MSR_P6_EVNTSEL0,
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| /openbmc/linux/arch/x86/kvm/vmx/ |
| H A D | pmu_intel.c | 95 return get_gp_pmc(pmu, MSR_P6_EVNTSEL0 + pmc_idx, in intel_pmc_idx_to_pmc()
96 MSR_P6_EVNTSEL0); in intel_pmc_idx_to_pmc()
222 get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0) || in intel_is_valid_msr()
237 pmc = pmc ? pmc : get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0); in intel_msr_idx_to_pmc()
379 } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { in intel_pmu_get_msr()
446 } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { in intel_pmu_set_msr()
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| /openbmc/linux/tools/testing/selftests/kvm/x86_64/ |
| H A D | pmu_event_filter_test.c | 161 check_msr(MSR_P6_EVNTSEL0, 0xffff); in intel_guest_code()
167 wrmsr(MSR_P6_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_guest_code()
525 wrmsr(MSR_P6_EVNTSEL0 + 0, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
527 wrmsr(MSR_P6_EVNTSEL0 + 1, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
529 wrmsr(MSR_P6_EVNTSEL0 + 2, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
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| /openbmc/linux/arch/x86/xen/ |
| H A D | pmu.c | 179 if ((msr_index >= MSR_P6_EVNTSEL0) && in is_intel_pmu_msr()
180 (msr_index < MSR_P6_EVNTSEL0 + intel_num_arch_counters)) { in is_intel_pmu_msr()
181 *index = msr_index - MSR_P6_EVNTSEL0; in is_intel_pmu_msr()
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| /openbmc/linux/arch/x86/kernel/cpu/ |
| H A D | perfctr-watchdog.c | 93 return msr - MSR_P6_EVNTSEL0; in nmi_evntsel_msr_to_bit()
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| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | msr-index.h | 234 #define MSR_P6_EVNTSEL0 0x00000186 macro
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| /openbmc/linux/tools/arch/x86/include/asm/ |
| H A D | msr-index.h | 523 #define MSR_P6_EVNTSEL0 0x00000186 macro
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| /openbmc/linux/arch/x86/include/asm/ |
| H A D | msr-index.h | 540 #define MSR_P6_EVNTSEL0 0x00000186 macro
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| /openbmc/qemu/target/i386/ |
| H A D | cpu.h | 454 #define MSR_P6_EVNTSEL0 0x186 macro
1528 #define MAX_GP_COUNTERS (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0)
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| /openbmc/qemu/target/i386/kvm/ |
| H A D | kvm.c | 4013 kvm_msr_entry_add(cpu, MSR_P6_EVNTSEL0 + i, in kvm_put_msrs()
4486 kvm_msr_entry_add(cpu, MSR_P6_EVNTSEL0 + i, 0); in kvm_get_msrs()
4798 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL0 + MAX_GP_COUNTERS - 1: in kvm_get_msrs()
4799 env->msr_gp_evtsel[index - MSR_P6_EVNTSEL0] = msrs[i].data; in kvm_get_msrs()
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| /openbmc/linux/arch/x86/kvm/ |
| H A D | x86.c | 3904 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1: in kvm_set_msr_common()
4090 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1: in kvm_get_msr_common()
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