Home
last modified time | relevance | path

Searched refs:MSR_OFFCORE_RSP_1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/x86/events/intel/
H A Dcore.c167 INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0xffff, RSP_1),
234 INTEL_UEVENT_EXTRA_REG(0x02b7, MSR_OFFCORE_RSP_1, 0x399ffbffe7ull, RSP_1),
241 INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3f807f8fffull, RSP_1),
249 INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffff8fffull, RSP_1),
256 INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffff8fffull, RSP_1),
296 INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffffbfffull, RSP_1),
304 INTEL_UEVENT_EXTRA_REG(0x012b, MSR_OFFCORE_RSP_1, 0x3fffffffffull, RSP_1),
354 INTEL_UEVENT_EXTRA_REG(0x012b, MSR_OFFCORE_RSP_1, 0x3fffffffffull, RSP_1),
1665 INTEL_UEVENT_EXTRA_REG(0x02b7, MSR_OFFCORE_RSP_1, 0x368005ffffull, RSP_1),
1818 INTEL_UEVENT_EXTRA_REG(0x02b7, MSR_OFFCORE_RSP_1, 0x360005ffbfull, RSP_1),
[all …]
/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr-index.h85 #define MSR_OFFCORE_RSP_1 0x000001a7 macro
/openbmc/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h205 #define MSR_OFFCORE_RSP_1 0x000001a7 macro
/openbmc/linux/arch/x86/include/asm/
H A Dmsr-index.h220 #define MSR_OFFCORE_RSP_1 0x000001a7 macro