Searched refs:MSR_IA32_RTIT_OUTPUT_BASE (Results 1 – 7 of 7) sorted by relevance
| /openbmc/linux/arch/x86/events/intel/ |
| H A D | pt.c | 640 wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, reg); in pt_config_buffer()
966 rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, pt->output_base); in pt_read_offset()
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| /openbmc/linux/tools/arch/x86/include/asm/ |
| H A D | msr-index.h | 317 #define MSR_IA32_RTIT_OUTPUT_BASE 0x00000560 macro
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| /openbmc/linux/arch/x86/include/asm/ |
| H A D | msr-index.h | 333 #define MSR_IA32_RTIT_OUTPUT_BASE 0x00000560 macro
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| /openbmc/linux/arch/x86/kvm/vmx/ |
| H A D | vmx.c | 701 case MSR_IA32_RTIT_OUTPUT_BASE: in is_valid_passthrough_msr()
1208 wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_load_msr()
1222 rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_save_msr()
2099 case MSR_IA32_RTIT_OUTPUT_BASE: in vmx_get_msr()
2401 case MSR_IA32_RTIT_OUTPUT_BASE: in vmx_set_msr()
4113 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_BASE, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
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| /openbmc/qemu/target/i386/ |
| H A D | cpu.h | 497 #define MSR_IA32_RTIT_OUTPUT_BASE 0x560 macro
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| /openbmc/qemu/target/i386/kvm/ |
| H A D | kvm.c | 4144 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_BASE, in kvm_put_msrs()
4572 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_BASE, 0); in kvm_get_msrs()
4919 case MSR_IA32_RTIT_OUTPUT_BASE: in kvm_get_msrs()
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| /openbmc/linux/arch/x86/kvm/ |
| H A D | x86.c | 1459 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
7164 case MSR_IA32_RTIT_OUTPUT_BASE: in kvm_probe_msr_to_save()
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