Searched refs:MSR_F15H_PERF_CTL (Results 1 – 6 of 6) sorted by relevance
84 if (msr >= MSR_F15H_PERF_CTL) in nmi_evntsel_msr_to_bit()85 return (msr - MSR_F15H_PERF_CTL) >> 1; in nmi_evntsel_msr_to_bit()
657 #define MSR_F15H_PERF_CTL 0xc0010200 macro658 #define MSR_F15H_PERF_CTL0 MSR_F15H_PERF_CTL659 #define MSR_F15H_PERF_CTL1 (MSR_F15H_PERF_CTL + 2)660 #define MSR_F15H_PERF_CTL2 (MSR_F15H_PERF_CTL + 4)661 #define MSR_F15H_PERF_CTL3 (MSR_F15H_PERF_CTL + 6)662 #define MSR_F15H_PERF_CTL4 (MSR_F15H_PERF_CTL + 8)663 #define MSR_F15H_PERF_CTL5 (MSR_F15H_PERF_CTL + 10)
678 #define MSR_F15H_PERF_CTL 0xc0010200 macro679 #define MSR_F15H_PERF_CTL0 MSR_F15H_PERF_CTL680 #define MSR_F15H_PERF_CTL1 (MSR_F15H_PERF_CTL + 2)681 #define MSR_F15H_PERF_CTL2 (MSR_F15H_PERF_CTL + 4)682 #define MSR_F15H_PERF_CTL3 (MSR_F15H_PERF_CTL + 6)683 #define MSR_F15H_PERF_CTL4 (MSR_F15H_PERF_CTL + 8)684 #define MSR_F15H_PERF_CTL5 (MSR_F15H_PERF_CTL + 10)
78 amd_ctrls_base = MSR_F15H_PERF_CTL; in xen_pmu_arch_init()124 return MSR_F15H_PERF_CTL + (addr - MSR_K7_EVNTSEL0); in get_fam15h_addr()138 if ((msr >= MSR_F15H_PERF_CTL && in is_amd_pmu_msr()
280 #define MSR_F15H_PERF_CTL 0xc0010200 macro
1367 x86_pmu.eventsel = MSR_F15H_PERF_CTL; in amd_core_pmu_init()