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Searched refs:MRSHPC_MW1CR2 (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/pcmcia/
H A Dmarubun_pcmcia.c36 #define MRSHPC_MW1CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 24) macro
72 outw(0x0a00,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 1 */ in pcmcia_on()
74 outw(0x0200,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 0 */ in pcmcia_on()
/openbmc/linux/arch/sh/include/mach-se/mach/
H A Dmrshpc.h35 __raw_writew(0x0a00, MRSHPC_MW1CR2); in mrshpc_setup_windows()
38 __raw_writew(0x0200, MRSHPC_MW1CR2); in mrshpc_setup_windows()
H A Dse7751.h55 #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) macro
H A Dse7721.h44 #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) macro
H A Dse7722.h45 #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) macro
H A Dse.h60 #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) macro
H A Dse7343.h47 #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) macro