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Searched refs:MR2_CWL_9 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ram/aspeed/
H A Dsdram_phy_ast2600.h127 #define MR2_CWL_9 0 macro
128 #define MR2_VAL (0x0000 | RTT_WR | MR2_CWL_9)