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Searched refs:MPU (Results 1 – 25 of 75) sorted by relevance

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/openbmc/linux/arch/arm/
H A DKconfig-nommu57 bool 'Use the ARM v7 PMSA Compliant MPU'
62 Unit (MPU) that defines the type and permissions for regions of
65 If your CPU has an MPU then you should choose 'y' here unless you
66 know that you do not want to use the MPU.
/openbmc/linux/Documentation/devicetree/bindings/arm/omap/
H A Dmpu.txt1 * TI - MPU (Main Processor Unit) subsystem
3 The MPU subsystem contain one or several ARM cores
5 The MPU contain CPUs, GIC, L2 cache and a local PRCM.
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j721s2-mcu-wakeup.dtsi52 * firmware on non-MPU processors
108 /* Non-MPU Firmware usage */
119 /* Non-MPU Firmware usage */
160 /* Non-MPU Firmware usage */
174 /* Non-MPU Firmware usage */
188 /* Non-MPU Firmware usage */
202 /* Non-MPU Firmware usage */
216 /* Non-MPU Firmware usage */
230 /* Non-MPU Firmware usage */
244 /* Non-MPU Firmware usage */
[all …]
H A Dk3-j784s4-mcu-wakeup.dtsi57 * firmware on non-MPU processors
125 /* Non-MPU Firmware usage */
136 /* Non-MPU Firmware usage */
164 /* Non-MPU Firmware usage */
179 /* Non-MPU Firmware usage */
193 /* Non-MPU Firmware usage */
207 /* Non-MPU Firmware usage */
221 /* Non-MPU Firmware usage */
235 /* Non-MPU Firmware usage */
249 /* Non-MPU Firmware usage */
[all …]
H A Dk3-j721e-mcu-wakeup.dtsi72 /* Non-MPU Firmware usage */
83 /* Non-MPU Firmware usage */
105 /* Non-MPU Firmware usage */
119 /* Non-MPU Firmware usage */
133 /* Non-MPU Firmware usage */
147 /* Non-MPU Firmware usage */
161 /* Non-MPU Firmware usage */
175 /* Non-MPU Firmware usage */
189 /* Non-MPU Firmware usage */
203 /* Non-MPU Firmware usage */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Domap-dmic.txt6 <MPU access base address, size>,
15 reg = <0x4012e000 0x7f>, /* MPU private access */
H A Domap-mcpdm.txt6 <MPU access base address, size>,
17 reg = <0x40132000 0x7f>, /* MPU private access */
/openbmc/linux/Documentation/arch/arm/omap/
H A Domap_pm.rst34 1. Set the maximum MPU wakeup latency::
87 set_max_mpu_wakeup_lat() function to constrain the MPU wakeup
92 /* Limit MPU wakeup latency */
119 CPUFreq expresses target MPU performance levels in terms of MPU
121 specialized cases to convert that input information (OPPs/MPU
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/
H A D0016-Platform-corstone1000-Fix-isolation-L2-memory-protection.patch9 This patch changes the S_DATA_START to S_DATA_LIMIT MPU region to be
10 configured for privileged access only. It also reorders the MPU regions
12 number and so takes priority in the operation of the Armv6-M MPU.
/openbmc/u-boot/board/bosch/shc/
H A DREADME82 MPU reference clock runs at 6 MHz
83 Setting MPU clock to 594 MHz
84 Enabling Spread Spectrum of 18 permille for MPU
/openbmc/u-boot/board/siemens/pxm2/
H A Dboard.c88 #define MPU 0 macro
96 if (module == MPU) in voltage_update()
155 if (voltage_update(MPU, PMIC_OP_REG_SEL_1_2_6) || in spl_siemens_board_init()
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dwkup_m3_rproc.txt6 that cannot be controlled from the MPU. This CM3 processor requires a firmware
14 (l4_wkup) through which it is accessible to the MPU.
/openbmc/u-boot/arch/arm/mach-omap2/omap5/
H A DKconfig74 prompt "MPU Voltage Domain"
77 Select the Operating Performance Point(OPP) for the MPU voltage
83 This config option enables Normal OPP for MPU. This is the safest
/openbmc/u-boot/doc/
H A DREADME.arm-caches21 - Flush the buffer after the MPU writes the data and before the DMA is
30 - Invalidate the buffer after the DMA is complete and before the MPU reads
/openbmc/u-boot/include/power/
H A Dtps65910.h11 #define MPU 0 macro
/openbmc/linux/Documentation/arch/arm/stm32/
H A Dstm32mp157-overview.rst8 The STM32MP157 is a Cortex-A MPU aimed at various applications.
H A Dstm32mp151-overview.rst8 The STM32MP151 is a Cortex-A MPU aimed at various applications.
H A Dstm32mp13-overview.rst8 The STM32MP131/STM32MP133/STM32MP135 are Cortex-A MPU aimed at various applications.
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dst,stm32mp1.txt25 MPU AXI MCU PLL12 PLL3 PLL4 RTC MCO1 MCO2
32 MPU AXI MCU APB1 APB2 APB3 APB4 APB5 RTC MCO1 MCO2
117 1 /*MPU*/
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-l4-abe.dtsi109 reg = <0x0 0xff>, /* MPU private access */
144 reg = <0x0 0xff>, /* MPU private access */
179 reg = <0x0 0xff>, /* MPU private access */
233 reg = <0x0 0x7f>, /* MPU private access */
276 reg = <0x0 0x7f>, /* MPU private access */
H A Domap4-l4-abe.dtsi109 reg = <0x0 0xff>, /* MPU private access */
144 reg = <0x0 0xff>, /* MPU private access */
179 reg = <0x0 0xff>, /* MPU private access */
251 reg = <0x0 0x7f>, /* MPU private access */
313 reg = <0x0 0x7f>, /* MPU private access */
/openbmc/linux/Documentation/sound/
H A Dalsa-configuration.rst361 port # for MPU-401 UART (0x300,0x330), -1 = disabled (default)
363 IRQ # for MPU-401 UART (3,5,7,9), -1 = disabled (default)
403 port # for MPU-401 UART (0x300,0x330), -1 = disabled (default)
405 IRQ # for MPU-401 UART (5,7,9,10), -1 = disabled (default)
544 port # for MPU-401 UART (optional), -1 = disable
548 IRQ # for MPU-401 UART
575 port # for MPU-401 UART (PnP setup - 0x300), -1 = disable
581 IRQ # for MPU-401 UART (9,11,12,15)
822 port # for MPU-401 port (0x300,0x310,0x320,0x330), -1 = disable (default)
824 IRQ # for MPU-401 port (5,7,9,10)
[all …]
/openbmc/linux/arch/arm/kernel/
H A Dhead-nommu.S108 bl __secondary_setup_mpu @ Initialize the MPU
168 orreq r0, r0, #CR_M @ Set SCTRL.M (MPU on)
284 ands r5, r0, #MPUIR_DREGION_SZMASK @ 0 size d region => No MPU
475 ands r5, r0, #MPUIR_DREGION_SZMASK @ 0 size d region => No MPU
/openbmc/linux/drivers/iio/imu/inv_mpu6050/
H A DKconfig3 # inv-mpu6050 drivers for Invensense MPU devices and combos
/openbmc/u-boot/drivers/power/pmic/
H A Dpmic_tps65910.c85 if (module == MPU) in tps65910_voltage_update()

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