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Searched refs:MP1_SMN_PUB_CTRL__RESET_MASK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_11_0_sh_mask.h936 #define MP1_SMN_PUB_CTRL__RESET_MASK … macro
H A Dmp_9_0_sh_mask.h1018 #define MP1_SMN_PUB_CTRL__RESET_MASK 0x00000001L macro
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c164 1 & MP1_SMN_PUB_CTRL__RESET_MASK); in smu_v11_0_load_microcode()
166 1 & ~MP1_SMN_PUB_CTRL__RESET_MASK); in smu_v11_0_load_microcode()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c161 1 & MP1_SMN_PUB_CTRL__RESET_MASK); in smu_v13_0_load_microcode()
163 1 & ~MP1_SMN_PUB_CTRL__RESET_MASK); in smu_v13_0_load_microcode()