/openbmc/qemu/tcg/ |
H A D | tcg-op-ldst.c | 53 if (a_bits == (op & MO_SIZE)) { in tcg_canonicalize_memop() 57 switch (op & MO_SIZE) { in tcg_canonicalize_memop() 209 switch (orig_memop & MO_SIZE) { in tcg_gen_qemu_ld_i32_int() 228 tcg_debug_assert((memop & MO_SIZE) <= MO_32); in tcg_gen_qemu_ld_i32_chk() 245 switch (memop & MO_SIZE) { in tcg_gen_qemu_st_i32_int() 333 switch (orig_memop & MO_SIZE) { in tcg_gen_qemu_ld_i64_int() 375 switch (memop & MO_SIZE) { in tcg_gen_qemu_st_i64_int() 449 mop_1 = (mop_1 & ~MO_SIZE) | MO_64; in canonicalize_memop_i128_as_i64() 948 if ((memop & MO_SIZE) == MO_64) { in tcg_gen_atomic_cmpxchg_i64_int() 1132 gen = table[memop & (MO_SIZE | MO_BSWAP)]; in do_atomic_op_i32() [all …]
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H A D | tcg.c | 215 static void * const qemu_st_helpers[MO_SIZE + 1] __attribute__((unused)) = { 5509 MemOp size = opc & MO_SIZE; in atom_and_align_for_opc() 5614 if ((mov[i].src_ext & MO_SIZE) != dst_mo) { in tcg_out_helper_load_slots() 5826 switch (mop & MO_SIZE) { in tcg_out_ld_helper_args() 5994 switch (mop & MO_SIZE) { in tcg_out_st_helper_args()
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/openbmc/qemu/accel/tcg/ |
H A D | ldst_common.c.inc | 18 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_8); 25 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_16); 32 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_32); 39 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_64); 69 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_128); 85 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_8); 92 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_16); 99 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_32); 106 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_64); 137 tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_UB); [all …]
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H A D | cputlb.c | 1770 MemOp size = l->memop & MO_SIZE; in mmu_lookup() 2164 tmp = mop & MO_SIZE; in do_ld_beN() 2420 MemOp mop8 = (l.memop & ~MO_SIZE) | MO_64; in do_ld16_mmu() 2574 tmp = mop & MO_SIZE; in do_st_leN() 2829 MemOp mop8 = (l.memop & ~(MO_SIZE | MO_BSWAP)) | MO_64; in do_st16_mmu()
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H A D | user-exec.c | 1051 tcg_debug_assert((mop & MO_SIZE) == MO_128); in do_ld16_mmu()
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/openbmc/qemu/include/exec/ |
H A D | memop.h | 26 MO_SIZE = 0x07, /* Mask for the above. */ enumerator 148 MO_SSIZE = MO_SIZE | MO_SIGN, 154 return 1 << (op & MO_SIZE); in memop_size()
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/openbmc/qemu/target/sparc/ |
H A D | ldst_helper.c | 581 int size = 1 << (memop & MO_SIZE); in helper_ld_asi() 802 int size = 1 << (memop & MO_SIZE); in helper_st_asi() 1152 switch (mop & MO_SIZE) { in helper_ld_code() 1196 int size = 1 << (memop & MO_SIZE); in helper_ld_asi() 1285 int size = 1 << (memop & MO_SIZE); in helper_st_asi() 1316 int size = 1 << (memop & MO_SIZE); in helper_ld_asi() 1615 int size = 1 << (memop & MO_SIZE); in helper_st_asi()
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/openbmc/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_fmemory.c.inc | 8 if ((mop & MO_SIZE) == MO_32) {
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/openbmc/qemu/tcg/sparc64/ |
H A D | tcg-target.c.inc | 1015 sgn = (opc & MO_SIZE) < MO_32 ? MO_SIGN : 0; 1018 tcg_out_call(s, qemu_ld_helpers[opc & (MO_SIZE | sgn)], NULL); 1036 tcg_out_call(s, qemu_st_helpers[opc & MO_SIZE], NULL); 1070 MemOp s_bits = opc & MO_SIZE; 1207 static const int st_opc[(MO_SIZE | MO_BSWAP) + 1] = { 1225 st_opc[get_memop(oi) & (MO_BSWAP | MO_SIZE)]);
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/openbmc/qemu/plugins/ |
H A D | api.c | 334 return op & MO_SIZE; in qemu_plugin_mem_size_shift()
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/openbmc/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 1175 tcg_out_call_int(s, qemu_st_helpers[opc & MO_SIZE], false); 1216 unsigned s_bits = opc & MO_SIZE; 1403 switch (opc & MO_SIZE) { 1461 if (use_mips32r6_instructions || h.aa.align >= (opc & MO_SIZE)) { 1478 switch (opc & MO_SIZE) { 1509 switch (opc & MO_SIZE) { 1548 if (use_mips32r6_instructions || h.aa.align >= (opc & MO_SIZE)) {
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/openbmc/qemu/include/tcg/ |
H A D | tcg.h | 299 a = memop & MO_SIZE; in get_alignment_bits()
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/openbmc/qemu/tcg/ppc/ |
H A D | tcg-target.c.inc | 2348 static const uint32_t qemu_stx_opc[(MO_SIZE + MO_BSWAP) + 1] = { 2387 tcg_out_call_int(s, LK, qemu_ld_helpers[opc & MO_SIZE]); 2403 tcg_out_call_int(s, LK, qemu_st_helpers[opc & MO_SIZE]); 2419 if ((memop & MO_SIZE) <= MO_64) { 2459 s_bits = opc & MO_SIZE; 2639 if (TCG_TARGET_REG_BITS == 32 && (opc & MO_SIZE) == MO_64) { 2665 insn = qemu_ldx_opc[opc & (MO_SIZE | MO_BSWAP)]; 2690 if (TCG_TARGET_REG_BITS == 32 && (opc & MO_SIZE) == MO_64) { 2704 uint32_t insn = qemu_stx_opc[opc & (MO_BSWAP | MO_SIZE)];
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/openbmc/qemu/target/arm/tcg/ |
H A D | translate-a64.c | 379 MemOp size = mop & MO_SIZE; in check_atomic_align() 406 MemOp size = mop & MO_SIZE; in check_ordered_align() 949 (memop & MO_SIZE), in do_gpr_st_memidx() 980 g_assert((memop & MO_SIZE) <= MO_32); in do_gpr_ld_memidx() 988 (memop & MO_SIZE), in do_gpr_ld_memidx() 1017 if ((mop & MO_SIZE) < MO_128) { in do_fp_st() 1039 if ((mop & MO_SIZE) < MO_128) { in do_fp_ld() 1074 int vect_off = vec_reg_offset(s, srcidx, element, memop & MO_SIZE); in read_vec_element() 1177 read_vec_element(s, tcg_tmp, srcidx, element, mop & MO_SIZE); in do_vec_st() 1188 write_vec_element(s, tcg_tmp, destidx, element, mop & MO_SIZE); in do_vec_ld() [all …]
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H A D | translate.h | 743 if ((opc & MO_SIZE) == MO_128) { in finalize_memop_asimd()
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H A D | translate.c | 195 int sas = memop & MO_SIZE; in disas_set_da_iss() 926 if (!IS_USER_ONLY && s->sctlr_b && (op & MO_SIZE) < MO_32) { in gen_aa32_addr() 927 tcg_gen_xori_tl(addr, addr, 4 - (1 << (op & MO_SIZE))); in gen_aa32_addr() 958 if (!IS_USER_ONLY && s->sctlr_b && (opc & MO_SIZE) == MO_64) { in gen_aa32_ld_internal_i64() 969 if (!IS_USER_ONLY && s->sctlr_b && (opc & MO_SIZE) == MO_64) { in gen_aa32_st_internal_i64() 1161 int element_size = 1 << (memop & MO_SIZE); in neon_element_offset()
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/openbmc/qemu/tcg/loongarch64/ |
H A D | tcg-target.c.inc | 945 tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SIZE], false); 960 tcg_out_call_int(s, qemu_st_helpers[opc & MO_SIZE], false); 997 unsigned s_bits = opc & MO_SIZE; 1136 switch (opc & MO_SIZE) {
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/openbmc/qemu/target/microblaze/ |
H A D | translate.c | 713 MemOp size = mop & MO_SIZE; in do_load() 863 MemOp size = mop & MO_SIZE; in do_store()
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/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvi.c.inc | 249 if ((memop & MO_SIZE) <= MO_64) { 359 if ((memop & MO_SIZE) <= MO_64) {
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/openbmc/qemu/tcg/s390x/ |
H A D | tcg-target.c.inc | 1692 if ((memop & MO_SIZE) <= MO_64) { 1766 switch (opc & (MO_SIZE | MO_BSWAP)) { 1823 tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SIZE]); 1840 tcg_out_call_int(s, qemu_st_helpers[opc & MO_SIZE]); 1862 MemOp s_bits = opc & MO_SIZE;
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/openbmc/qemu/target/s390x/tcg/ |
H A D | translate_vx.c.inc | 68 const int offs = vec_reg_offset(reg, enr, memop & MO_SIZE); 101 const int offs = vec_reg_offset(reg, enr, memop & MO_SIZE); 128 const int offs = vec_reg_offset(reg, enr, memop & MO_SIZE); 151 const int offs = vec_reg_offset(reg, enr, memop & MO_SIZE);
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/openbmc/qemu/tcg/arm/ |
H A D | tcg-target.c.inc | 1384 tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SIZE]); 1402 tcg_out_goto(s, COND_AL, qemu_st_helpers[opc & MO_SIZE]); 1441 unsigned s_mask = (1 << (opc & MO_SIZE)) - 1; 1667 switch (opc & MO_SIZE) {
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/openbmc/qemu/tcg/aarch64/ |
H A D | tcg-target.c.inc | 1712 tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SIZE]); 1727 tcg_out_call_int(s, qemu_st_helpers[opc & MO_SIZE]); 1748 MemOp s_bits = opc & MO_SIZE; 1888 switch (memop & MO_SIZE) {
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/openbmc/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 1943 if ((memop & MO_SIZE) < MO_128) { 2019 tcg_out_branch(s, 1, qemu_ld_helpers[opc & MO_SIZE]); 2041 tcg_out_branch(s, 1, qemu_st_helpers[opc & MO_SIZE]); 2097 MemOp s_bits = opc & MO_SIZE; 2402 switch (memop & MO_SIZE) {
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/openbmc/qemu/target/riscv/ |
H A D | translate.c | 1086 MemOp size = mop & MO_SIZE; in gen_amo()
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