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Searched refs:MODER (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_gpio-test.c29 #define MODER 0x00 macro
162 case MODER: in reset()
197 gpio_writel(GPIO_A, MODER, 0xDEADBEEF); in test_idr_reset_value()
202 gpio_writel(GPIO_B, MODER, 0xDEADBEEF); in test_idr_reset_value()
207 gpio_writel(GPIO_C, MODER, 0xDEADBEEF); in test_idr_reset_value()
212 gpio_writel(GPIO_H, MODER, 0xDEADBEEF); in test_idr_reset_value()
219 uint32_t moder = gpio_readl(GPIO_A, MODER); in test_idr_reset_value()
226 g_assert_cmphex(moder, ==, reset(GPIO_A, MODER)); in test_idr_reset_value()
234 moder = gpio_readl(GPIO_B, MODER); in test_idr_reset_value()
241 g_assert_cmphex(moder, ==, reset(GPIO_B, MODER)); in test_idr_reset_value()
[all …]
/openbmc/qemu/hw/net/
H A Dopencores_eth.c137 MODER, enumerator
337 s->regs[MODER] = 0xa000; in open_eth_reset()
357 return GET_REGBIT(s, MODER, RXEN) && (s->regs[TX_BD_NUM] < 0x80); in open_eth_can_receive()
376 miss = GET_REGBIT(s, MODER, BRO);
377 } else if ((buf[0] & 0x1) || GET_REGBIT(s, MODER, IAM)) {
393 if (miss && !GET_REGBIT(s, MODER, PRO)) {
399 if (GET_REGBIT(s, MODER, RECSMALL) || size >= minfl) {
405 size_t copy_size = GET_REGBIT(s, MODER, HUGEN) ? 65536 : maxfl;
424 if (GET_REGBIT(s, MODER, HUGEN) && size > maxfl) {
435 if (GET_REGBIT(s, MODER, PAD) && copy_size < minfl) {
[all …]
/openbmc/u-boot/drivers/net/
H A Dethoc.c23 #define MODER 0x00 macro
247 u32 mode = ethoc_read(priv, MODER); in ethoc_enable_rx_and_tx()
249 ethoc_write(priv, MODER, mode); in ethoc_enable_rx_and_tx()
254 u32 mode = ethoc_read(priv, MODER); in ethoc_disable_rx_and_tx()
256 ethoc_write(priv, MODER, mode); in ethoc_disable_rx_and_tx()
315 mode = ethoc_read(priv, MODER); in ethoc_reset()
317 ethoc_write(priv, MODER, mode); in ethoc_reset()
320 mode = ethoc_read(priv, MODER); in ethoc_reset()
322 ethoc_write(priv, MODER, mode); in ethoc_reset()
/openbmc/linux/drivers/net/ethernet/
H A Dethoc.c32 #define MODER 0x00 macro
290 u32 mode = ethoc_read(dev, MODER); in ethoc_enable_rx_and_tx()
292 ethoc_write(dev, MODER, mode); in ethoc_enable_rx_and_tx()
297 u32 mode = ethoc_read(dev, MODER); in ethoc_disable_rx_and_tx()
299 ethoc_write(dev, MODER, mode); in ethoc_disable_rx_and_tx()
357 mode = ethoc_read(dev, MODER); in ethoc_reset()
359 ethoc_write(dev, MODER, mode); in ethoc_reset()
362 mode = ethoc_read(dev, MODER); in ethoc_reset()
364 ethoc_write(dev, MODER, mode); in ethoc_reset()
689 mode = ethoc_read(priv, MODER); in ethoc_mdio_poll()
[all …]
/openbmc/u-boot/arch/sh/include/asm/
H A Dcpu_sh7780.h340 #define MODER 0xFFE60016 macro
H A Dcpu_sh7722.h907 #define MODER 0xA4448016 macro