/openbmc/linux/Documentation/translations/zh_CN/PCI/ |
H A D | pci.rst | 54 - 请求MMIO/IOP资源 69 - 释放MMIO/IOP资源 182 - 请求MMIO/IOP资源 227 请求MMIO/IOP资源 241 后确定MMIO和IO端口资源的可用性。 337 - 禁用设备对MMIO/IO端口地址的响应 338 - 释放MMIO/IO端口资源 390 禁止设备对MMIO/IO端口地址做出响应 397 释放MMIO/IO端口资源 485 MMIO空间和“写通知” [all …]
|
/openbmc/linux/Documentation/translations/zh_CN/userspace-api/accelerators/ |
H A D | ocxl.rst | 72 存上下文、内存映射IO(MMIO)区域的大小等。 76 MMIO chapter 79 OpenCAPI为每个AFU定义了两个MMIO区域: 81 * 全局MMIO区域,保存和整个AFU相关的寄存器。 82 * 每个进程的MMIO区域,对于每个上下文固定大小。 168 一个进程可以mmap每个进程的MMIO区域来和AFU交互。
|
/openbmc/linux/Documentation/devicetree/bindings/misc/ |
H A D | pvpanic-mmio.txt | 1 * QEMU PVPANIC MMIO Configuration bindings 4 MMIO Configuration interface on the "virt" machine. 14 - reg: the MMIO region used by the device.
|
/openbmc/linux/Documentation/devicetree/bindings/security/tpm/ |
H A D | tpm_tis_mmio.txt | 1 Trusted Computing Group MMIO Trusted Platform Module 4 is the standard protocol defined to access the TPM via MMIO. Typically 15 - reg: The location of the MMIO registers, should be at least 0x5000 bytes
|
/openbmc/linux/Documentation/admin-guide/hw-vuln/ |
H A D | processor_mmio_stale_data.rst | 2 Processor MMIO Stale Data Vulnerabilities 5 Processor MMIO Stale Data Vulnerabilities are a class of memory-mapped I/O 6 (MMIO) vulnerabilities that can expose data. The sequences of operations for 8 vulnerabilities require the attacker to have access to MMIO, many environments 9 are not affected. System environments using virtualization where MMIO access is 49 processors, MMIO primary reads will return 64 bytes of data to the core fill 57 Some endpoint MMIO registers incorrectly handle writes that are smaller than 145 is more critical, or the untrusted software has no MMIO access). Note that 170 virtualization case, VERW is only needed at VMENTER for a guest with MMIO 190 MDS/TAA, guest without MMIO access cannot extract secrets using Processor MMIO [all …]
|
/openbmc/qemu/hw/i386/xen/ |
H A D | trace-events | 7 xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address 0x%"PRIx64")" 8 xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address 0x%"PRIx64")"
|
/openbmc/linux/Documentation/userspace-api/accelerators/ |
H A D | ocxl.rst | 66 work with, the size of its MMIO areas, ... 70 MMIO chapter 73 OpenCAPI defines two MMIO areas for each AFU: 75 * the global MMIO area, with registers pertinent to the whole AFU. 76 * a per-process MMIO area, which has a fixed size for each context. 158 MMIO areas, the AFU version, and the PASID for the current context. 175 A process can mmap the per-process MMIO area for interactions with the
|
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/c-periphery/ |
H A D | c-periphery_2.4.2.bb | 1 SUMMARY = "C-Periphery lib used to access GPIO, LED, PWM, SPI, I2C, MMIO, Serial" 2 DESCRIPTION = "A C library for peripheral I/O (GPIO, LED, PWM, SPI, I2C, MMIO, Serial) in Linux"
|
/openbmc/linux/Documentation/devicetree/bindings/bus/ |
H A D | baikal,bt1-apb.yaml | 14 Baikal-T1 CPU or DMAC MMIO requests are handled by the AMBA 3 AXI Interconnect 31 - description: APB EHB MMIO registers 32 - description: APB MMIO region with no any device mapped
|
/openbmc/linux/arch/x86/kernel/cpu/ |
H A D | common.c | 1262 #define MMIO BIT(1) macro 1281 VULNBL_INTEL_STEPPINGS(HASWELL_X, X86_STEPPING_ANY, MMIO), 1282 VULNBL_INTEL_STEPPINGS(BROADWELL_D, X86_STEPPING_ANY, MMIO), 1284 VULNBL_INTEL_STEPPINGS(BROADWELL_X, X86_STEPPING_ANY, MMIO), 1286 VULNBL_INTEL_STEPPINGS(SKYLAKE_X, X86_STEPPING_ANY, MMIO | RETBLEED | GDS), 1293 VULNBL_INTEL_STEPPINGS(ICELAKE_D, X86_STEPPING_ANY, MMIO | GDS), 1294 VULNBL_INTEL_STEPPINGS(ICELAKE_X, X86_STEPPING_ANY, MMIO | GDS), 1296 VULNBL_INTEL_STEPPINGS(COMETLAKE_L, X86_STEPPINGS(0x0, 0x0), MMIO | RETBLEED), 1301 VULNBL_INTEL_STEPPINGS(ROCKETLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS), 1309 VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_D, X86_STEPPING_ANY, MMIO | RFDS), [all …]
|
/openbmc/qemu/docs/devel/ |
H A D | multi-process.rst | 118 vhost MMIO store acceleration 496 MMIO handling 590 #### MMIO acceleration 632 - MMIO request structure 638 the CPU that issued the MMIO. 643 | rid | range MMIO is within | 649 | len | MMIO length | 656 - MMIO request queues 658 MMIO request queues are FIFO arrays of MMIO request structures. There 757 A read returns any pending MMIO requests from the KVM driver as MMIO [all …]
|
H A D | memory.rst | 9 - memory-mapped I/O (MMIO) 20 (leaves) are RAM and MMIO regions, while other nodes represent 39 - MMIO: a range of guest memory that is implemented by host callbacks; 49 (directly accessing a region of host memory), but like MMIO for 61 and an MMIO region. 65 can overlay a subregion of RAM with MMIO or ROM, or a PCI controller 89 (that is, to an MMIO, RAM or ROM region). This means that the region 92 container itself (ie by its MMIO callbacks or RAM backing). However 337 BAR containing MMIO registers is mapped after it. 342 MMIO Operations [all …]
|
/openbmc/linux/drivers/gpio/ |
H A D | TODO | 55 driver infrastructure for doing simpler MMIO GPIO devices and there was 83 - Get rid of struct of_mm_gpio_chip altogether: use the generic MMIO 112 Generic MMIO GPIO 114 The GPIO drivers can utilize the generic MMIO helper library in many 115 cases, and the helper library should be as helpful as possible for MMIO 121 dry-code conversions to MMIO GPIO for maintainers to test 123 - Expand the MMIO GPIO or write a new library for regmap-based I/O 127 - Expand the MMIO GPIO or write a new library for port-mapped I/O 134 In the very similar way to Generic MMIO GPIO convert the users which can 136 MMIO case the regmap MMIO with gpio-regmap.c is preferable over gpio-mmio.c.
|
/openbmc/linux/drivers/misc/pvpanic/ |
H A D | Kconfig | 16 tristate "pvpanic MMIO device support" 19 This driver provides support for the MMIO pvpanic device.
|
/openbmc/u-boot/arch/arm/mach-sunxi/ |
H A D | rmr_switch.S | 12 @ Allwinner provides a writable alias of this register in MMIO space, so 34 ldr r1, =0x017000a0 @ MMIO mapped RVBAR[0] register 36 ldr r1, =0x09010040 @ MMIO mapped RVBAR[0] register
|
/openbmc/qemu/docs/specs/ |
H A D | standard-vga.rst | 35 MMIO bar, 4096 bytes in size (QEMU 1.3+) 48 Doesn't apply to the legacy-free pci variant, use the MMIO bar instead. 70 MMIO area spec
|
/openbmc/linux/Documentation/devicetree/bindings/regmap/ |
H A D | regmap.txt | 10 Regmap defaults to little-endian register access on MMIO based 18 of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS
|
/openbmc/linux/Documentation/arch/ia64/ |
H A D | aliasing.rst | 49 address space because some machines omit some or all of the MMIO 54 This contains only system memory; it does not contain MMIO space. 108 Since the EFI memory map does not describe MMIO on some 115 only allows mmap of the one megabyte "legacy MMIO" area for a 129 This is an MMIO mmap of PCI functions, which additionally may or 147 but could be accessed this way. For example, registers in MMIO 175 mmap of various MMIO regions from /dev/mem by "X" on Intel platforms 178 The EFI memory map may not report these MMIO regions. 226 0x00000-0xFFFFF WB only (no VGA MMIO hole)
|
/openbmc/linux/Documentation/powerpc/ |
H A D | cxl.rst | 99 MMIO space 102 A portion of the accelerator MMIO space can be directly mapped 141 context. Master contexts have access to the full MMIO space an 143 MMIO space an AFU provides. 147 /dev/cxl/afu0.0d. This will have access to the entire MMIO space 251 An AFU may have an MMIO space to facilitate communication with the 252 AFU. If it does, the MMIO space can be accessed via mmap. The size 257 the MMIO space and slave contexts are allowed to only map the per 258 process MMIO space associated with the context. In dedicated 259 process mode the entire MMIO space can always be mapped. [all …]
|
/openbmc/qemu/hw/nvme/ |
H A D | trace-events | 93 pci_nvme_mmio_intm_set(uint64_t data, uint64_t new_mask) "wrote MMIO, interrupt mask set, data=0x%"… 95 pci_nvme_mmio_cfg(uint64_t data) "wrote MMIO, config controller config=0x%"PRIx64"" 96 pci_nvme_mmio_aqattr(uint64_t data) "wrote MMIO, admin queue attributes=0x%"PRIx64"" 97 pci_nvme_mmio_asqaddr(uint64_t data) "wrote MMIO, admin submission queue address=0x%"PRIx64"" 98 pci_nvme_mmio_acqaddr(uint64_t data) "wrote MMIO, admin completion queue address=0x%"PRIx64"" 196 pci_nvme_ub_mmiowr_misaligned32(uint64_t offset) "MMIO write not 32-bit aligned, offset=0x%"PRIx64"" 197 pci_nvme_ub_mmiowr_toosmall(uint64_t offset, unsigned size) "MMIO write smaller than 32 bits, offse… 208 pci_nvme_ub_mmiowr_invalid(uint64_t offset, uint64_t data) "invalid MMIO write, offset=0x%"PRIx64",… 209 pci_nvme_ub_mmiord_misaligned32(uint64_t offset) "MMIO read not 32-bit aligned, offset=0x%"PRIx64"" 210 pci_nvme_ub_mmiord_toosmall(uint64_t offset) "MMIO read smaller than 32-bits, offset=0x%"PRIx64"" [all …]
|
/openbmc/linux/Documentation/PCI/ |
H A D | pci.rst | 46 - Request MMIO/IOP resources 62 - Release MMIO/IOP resources 183 - Request MMIO/IOP resources 236 Request MMIO/IOP resources 258 (for MMIO ranges) and request_region() (for IO Port ranges). 372 - Disable device from responding to MMIO/IO Port addresses 373 - Release MMIO/IO Port resource(s) 437 Disable Device from responding to MMIO/IO Port addresses 444 Release MMIO/IO Port Resource(s) 541 MMIO Space and "Write Posting" [all …]
|
/openbmc/linux/Documentation/mhi/ |
H A D | mhi.rst | 25 MMIO section in MHI Internals 28 MMIO (Memory mapped IO) consists of a set of registers in the device hardware, 30 Following are the major components of MMIO register space: 160 to access device MMIO register space. 165 programming MMIO registers. 192 the device's MMIO register space. To initialize the MHI in a device, 198 * Programs MHI MMIO registers and sets device into MHI_M0 state.
|
/openbmc/linux/Documentation/translations/ko_KR/ |
H A D | memory-barriers.txt | 121 - 캐시 일관성 vs MMIO. 1833 합니다. 하지만, 느슨한 순서 규칙의 메모리 I/O 윈도우를 통한 MMIO 의 효과를 2520 순서지어집니다. 이는 같은 CPU 쓰레드에 의한 특정 디바이스로의 MMIO 2526 호출된 MMIO 레지스터 쓰기는 해당 락의 획득에 일관적인 순서로 도달할 2533 전송을 시작시키기 위해 MMIO 컨트롤 레지스터에 쓰기를 할 때 DMA 2539 읽기는 이 DMA 수신의 완료를 표시하는 DMA 엔진의 MMIO 상태 레지스터 2544 주변장치로의 두개의 MMIO 레지스터 쓰기가 행해지는데 첫번째 쓰기가 2717 캐시 일관성 VS MMIO 2725 디바이스 버스로 곧바로 향한다는 것입니다. 이 말은 MMIO 액세스는 먼저 2728 MMIO 액세스가 어떤 방식으로든 의존적이라면 해당 캐시는 두 오퍼레이션 사이에 [all …]
|
/openbmc/linux/Documentation/trace/ |
H A D | mmiotrace.rst | 10 MMIO tracing was originally developed by Intel around 2003 for their Fault 12 Jeff Muizelaar created a tool for tracing MMIO accesses with the Nouveau 67 Load the driver you want to trace and use it. Mmiotrace will only catch MMIO 126 MMIO accesses are recorded via page faults. Just before __ioremap() returns, 166 zero if it is not recorded. PID is always zero as tracing MMIO accesses 182 - replaying MMIO logs, i.e., re-executing the recorded writes
|
/openbmc/linux/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/ |
H A D | overview.rst | 121 A DPRC has a mappable MMIO region (an MC portal) that can be used 172 supports and a summary of key resources of the object (MMIO regions 180 - MMIO regions: none 191 - MMIO regions: none 201 from the queues themselves. The DPIO provides an MMIO interface to 203 to the DPIO MMIO region, which includes the target queue number. 208 - MMIO regions: queue operations, buffer management 217 - MMIO regions: none 227 - MMIO regions: MC command portal
|