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Searched refs:MME (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-habanalabs97 Description: Allows the user to set the maximum clock frequency for MME, TPC
138 the MME compute engine. Writes to this parameter affect the
140 mode. The device MME clock might be set to lower value than the
142 frequency value of the MME. This property is valid only for the
149 Description: Displays the current clock frequency, in Hz, of the MME compute
/openbmc/linux/drivers/staging/rtl8723bs/core/
H A Drtw_xmit.c1153 u8 MME[_MME_IE_LENGTH_]; in rtw_mgmt_xmitframe_coalesce() local
1181 memset(MME, 0, 18); in rtw_mgmt_xmitframe_coalesce()
1191 MME[0] = padapter->securitypriv.dot11wBIPKeyid; in rtw_mgmt_xmitframe_coalesce()
1193 memcpy(&MME[2], &pmlmeext->mgnt_80211w_IPN, 6); in rtw_mgmt_xmitframe_coalesce()
1199 MME, &pattrib->pktlen); in rtw_mgmt_xmitframe_coalesce()
/openbmc/qemu/hw/char/
H A Dstm32l4x5_usart.c43 FIELD(CR1, MME, 13, 1) /* Mute mode enable */
/openbmc/linux/arch/powerpc/xmon/
H A Dppc-opc.c2468 #define MME(op, me, rc) (M ((op), (rc)) | ((((unsigned long)(me)) & 0x1f) << 1)) macro
4593 {"rotlwi", MME(21,31,0), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, SH}},
4594 {"clrlwi", MME(21,31,0), MSHME_MASK, PPCCOM, PPCVLE, {RA, RS, MB}},
4597 {"rotlwi.", MME(21,31,1), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, SH}},
4598 {"clrlwi.", MME(21,31,1), MSHME_MASK, PPCCOM, PPCVLE, {RA, RS, MB}},
4605 {"rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, RB}},
4608 {"rotlw.", MME(23,31,1), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, RB}},
/openbmc/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c103 #define IS_MME_QM_IDLE(qm_glbl_sts0) IS_QM_IDLE(MME, qm_glbl_sts0)
111 IS_CMDQ_IDLE(MME, cmdq_glbl_sts0)