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Searched refs:MLXSW_CORE_RES_GET (Results 1 – 25 of 26) sorted by relevance

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/openbmc/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_policer.c92 family->start_index = MLXSW_CORE_RES_GET(core, MAX_CPU_POLICERS); in mlxsw_sp_policer_single_rate_family_init()
93 family->end_index = MLXSW_CORE_RES_GET(core, MAX_GLOBAL_POLICERS); in mlxsw_sp_policer_single_rate_family_init()
415 global_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_GLOBAL_POLICERS); in mlxsw_sp_policer_resources_register()
416 cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS); in mlxsw_sp_policer_resources_register()
H A Dspectrum1_kvdl.c392 kvdl_max_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) - in mlxsw_sp1_kvdl_resources_register()
393 MLXSW_CORE_RES_GET(mlxsw_core, KVD_SINGLE_MIN_SIZE) - in mlxsw_sp1_kvdl_resources_register()
394 MLXSW_CORE_RES_GET(mlxsw_core, KVD_DOUBLE_MIN_SIZE); in mlxsw_sp1_kvdl_resources_register()
H A Dspectrum_dpipe.c213 rif_count = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_dpipe_table_erif_entries_dump()
263 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_dpipe_table_erif_counters_update()
283 return MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_dpipe_table_erif_size_get()
552 rif_count = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_dpipe_table_host_entries_get()
559 for (; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_dpipe_table_host_entries_get()
667 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_dpipe_table_host_counters_update()
706 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++) { in mlxsw_sp_dpipe_table_host_size_get()
H A Dspectrum_cnt.c259 pool_size = MLXSW_CORE_RES_GET(mlxsw_core, COUNTER_POOL_SIZE); in mlxsw_sp_counter_resources_register()
260 bank_size = MLXSW_CORE_RES_GET(mlxsw_core, COUNTER_BANK_SIZE); in mlxsw_sp_counter_resources_register()
H A Dspectrum_acl_erp.c1492 size = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_ERPT_ENTRIES_2KB); in mlxsw_sp_acl_erp_tables_sizes_query()
1495 size = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_ERPT_ENTRIES_4KB); in mlxsw_sp_acl_erp_tables_sizes_query()
1498 size = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_ERPT_ENTRIES_8KB); in mlxsw_sp_acl_erp_tables_sizes_query()
1501 size = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_ERPT_ENTRIES_12KB); in mlxsw_sp_acl_erp_tables_sizes_query()
1516 erpt_bank_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_erp_tables_init()
1518 erp_core->num_erp_banks = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_erp_tables_init()
H A Dspectrum.c269 max_fid = MLXSW_CORE_RES_GET(mlxsw_core, FID); in mlxsw_sp_txhdr_ptp_data_construct()
3565 u32 single_size_min = MLXSW_CORE_RES_GET(mlxsw_core, in mlxsw_sp_resource_size_params_prepare()
3567 u32 double_size_min = MLXSW_CORE_RES_GET(mlxsw_core, in mlxsw_sp_resource_size_params_prepare()
3569 u32 kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE); in mlxsw_sp_resource_size_params_prepare()
3614 kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE); in mlxsw_sp1_resources_kvd_register()
3669 kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE); in mlxsw_sp2_resources_kvd_register()
3689 max_span = MLXSW_CORE_RES_GET(mlxsw_core, MAX_SPAN); in mlxsw_sp_resources_span_register()
3709 max_rif_mac_profiles = MLXSW_CORE_RES_GET(mlxsw_core, in mlxsw_sp_resources_rif_mac_profile_register()
3732 max_rifs = MLXSW_CORE_RES_GET(mlxsw_core, MAX_RIFS); in mlxsw_sp_resources_rifs_register()
3880 double_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) - in mlxsw_sp_kvd_sizes_get()
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H A Dspectrum_port_range.c168 max = MLXSW_CORE_RES_GET(core, ACL_MAX_L4_PORT_RANGE); in mlxsw_sp_port_range_init()
H A Dspectrum_acl_ctcam.c129 max_tcam_rules = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_TCAM_RULES); in mlxsw_sp_acl_ctcam_region_parman_resize()
H A Dspectrum2_acl_tcam.c86 tcam->kvdl_count = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp2_acl_tcam_init()
H A Dspectrum_acl_tcam.c50 max_priority = MLXSW_CORE_RES_GET(mlxsw_sp->core, KVD_SIZE) - 1; in mlxsw_sp_acl_tcam_priority_get()
1583 max_tcam_regions = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_tcam_init()
1585 max_regions = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_REGIONS); in mlxsw_sp_acl_tcam_init()
1594 max_groups = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_GROUPS); in mlxsw_sp_acl_tcam_init()
1597 tcam->max_group_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_tcam_init()
H A Dspectrum_acl_atcam.c128 max_lkey_id = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_LARGE_KEY_ID); in mlxsw_sp_acl_atcam_region_12kb_init()
282 max_regions = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_REGIONS); in mlxsw_sp_acl_atcam_region_associate()
H A Dspectrum_acl_flex_actions.c309 mlxsw_sp->afa = mlxsw_afa_create(MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_afa_init()
H A Dspectrum_acl_bloom_filter.c498 bf_bank_size = 1 << MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_BF_LOG); in mlxsw_sp_acl_bf_init()
H A Dspectrum1_mr_tcam.c206 max_tcam_rules = MLXSW_CORE_RES_GET(mlxsw_sp->core, ACL_MAX_TCAM_RULES); in mlxsw_sp1_mr_tcam_region_parman_resize()
H A Dspectrum_pgt.c333 pgt->end_index = MLXSW_CORE_RES_GET(mlxsw_sp->core, PGT_SIZE); in mlxsw_sp_pgt_init()
H A Dspectrum_buffers.c1266 mlxsw_sp->sb->cell_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, CELL_SIZE); in mlxsw_sp_buffers_init()
1267 mlxsw_sp->sb->sb_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_buffers_init()
1269 max_headroom_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_buffers_init()
1384 if (size > MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_sb_pool_set()
H A Dspectrum_nve.c1109 max = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV4); in mlxsw_sp_nve_resources_query()
1111 max = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV6); in mlxsw_sp_nve_resources_query()
H A Dcore.c147 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, in mlxsw_ports_init()
202 *p_max_lag = MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG); in mlxsw_core_max_lag()
2215 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); in __mlxsw_core_bus_device_register()
3064 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + in mlxsw_core_lag_mapping_index()
3093 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { in mlxsw_core_lag_mapping_clear()
H A Dspectrum_mr_tcam.c36 int erif_list_entries = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_mr_erif_sublist_full()
H A Dpci.c1603 MLXSW_CORE_RES_GET(mlxsw_core, CQE_V2)) in mlxsw_pci_init()
1606 MLXSW_CORE_RES_GET(mlxsw_core, CQE_V1)) in mlxsw_pci_init()
1609 MLXSW_CORE_RES_GET(mlxsw_core, CQE_V0)) || in mlxsw_pci_init()
H A Dcore.h458 #define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id) \ macro
H A Dspectrum_router.c717 max_trees = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LPM_TREES); in mlxsw_sp_lpm_init()
778 int max_vrs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); in mlxsw_sp_vr_find_unused()
823 int max_vrs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); in mlxsw_sp_vr_find()
991 int max_vrs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); in mlxsw_sp_vrs_lpm_tree_replace()
1039 max_vrs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); in mlxsw_sp_vrs_init()
2414 u64 max_rifs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_router_neigh_ent_ipv4_process()
7523 int max_vrs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_VRS); in mlxsw_sp_router_fib_flush()
7927 int max_rifs = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); in mlxsw_sp_rif_find_by_dev()
10823 MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS), -1); in mlxsw_sp_rifs_table_init()
10851 MLXSW_CORE_RES_GET(core, MAX_RIF_MAC_PROFILES); in mlxsw_sp_rifs_init()
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H A Dspectrum_acl.c1065 acl->afk = mlxsw_afk_create(MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_acl_init()
H A Dspectrum_span.c89 entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_SPAN); in mlxsw_sp_span_init()
H A Dspectrum_switchdev.c1932 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_bridge_port_get_ports_bitmap()
2428 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core, in mlxsw_sp_lag_rep_port()

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