Searched refs:MIPSInst_RT (Results 1 – 3 of 3) sorted by relevance
82 if (MIPSInst_RT(ir)) in mipsr6_emul()83 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()91 if (MIPSInst_RT(ir)) in mipsr6_emul()92 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()108 regs->regs[MIPSInst_RT(ir)]; in mipsr6_emul()407 rt = regs->regs[MIPSInst_RT(ir)]; in mult_func()940 rt = MIPSInst_RT(inst); in mipsr2_decoder()1108 if (MIPSInst_RT(inst)) { in mipsr2_decoder()1271 if (MIPSInst_RT(inst) && !err) in mipsr2_decoder()1345 if (MIPSInst_RT(inst) && !err) in mipsr2_decoder()[all …]
898 if (MIPSInst_RT(ir)) in cop1_cfc()899 xcp->regs[MIPSInst_RT(ir)] = value; in cop1_cfc()912 if (MIPSInst_RT(ir) == 0) in cop1_ctc()1064 DITOREG(dval, MIPSInst_RT(ir)); in cop1Emulate()1071 DIFROMREG(dval, MIPSInst_RT(ir)); in cop1Emulate()1098 SITOREG(wval, MIPSInst_RT(ir)); in cop1Emulate()1105 SIFROMREG(wval, MIPSInst_RT(ir)); in cop1Emulate()1125 if (MIPSInst_RT(ir) != 0) { in cop1Emulate()1144 if (MIPSInst_RT(ir) != 0) { in cop1Emulate()1160 if (MIPSInst_RT(ir) != 0) { in cop1Emulate()[all …]
32 #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT) macro