/openbmc/linux/drivers/net/ethernet/amd/ |
H A D | sun3lance.c | 106 #define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base) 162 #define MEM lp->mem macro 343 MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000); in lance_probe() 344 if (!MEM) { in lance_probe() 361 dvma_free((void *)MEM); in lance_probe() 371 (unsigned long)MEM, in lance_probe() 378 MEM->init.hwaddr[0] = dev->dev_addr[1]; in lance_probe() 379 MEM->init.hwaddr[1] = dev->dev_addr[0]; in lance_probe() 380 MEM->init.hwaddr[2] = dev->dev_addr[3]; in lance_probe() 381 MEM->init.hwaddr[3] = dev->dev_addr[2]; in lance_probe() [all …]
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H A D | atarilance.c | 175 #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a)) 176 #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e)) 177 #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe)) 233 #define MEM lp->mem macro 241 #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base) 530 MEM = (struct lance_memory *)memaddr; in lance_probe1() 596 ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) | in lance_probe1() 597 ((((unsigned short *)MEM)[i*2+1] & 0x0f)); in lance_probe1() 611 MEM->init.mode = 0x0000; /* Disable Rx and Tx. */ in lance_probe1() 613 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ in lance_probe1() [all …]
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/openbmc/qemu/tests/tcg/s390x/ |
H A D | ex-relative-long.c | 30 #define MEM 0xfedcba9889abcdef macro 37 F(cgfrl, REG, MEM, 2) \ 38 F(cghrl, REG, MEM, 2) \ 39 F(cgrl, REG, MEM, 2) \ 40 F(chrl, REG, MEM, 1) \ 41 F(clgfrl, REG, MEM, 2) \ 42 F(clghrl, REG, MEM, 2) \ 43 F(clgrl, REG, MEM, 1) \ 44 F(clhrl, REG, MEM, 2) \ 45 F(clrl, REG, MEM, 1) \ [all …]
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/openbmc/linux/Documentation/arch/arm64/ |
H A D | ptdump.rst | 49 | 0xfff0000000000000-0xfff0000000210000 2112K PTE RW NX SHD AF UXN MEM/NORMAL-TAGGED | 50 | 0xfff0000000210000-0xfff0000001c00000 26560K PTE ro NX SHD AF UXN MEM/NORMAL | 62 | 0xffff800008010000-0xffff800008200000 1984K PTE ro x SHD AF UXN MEM/NORMAL | 63 | 0xffff800008200000-0xffff800008e00000 12M PTE ro x SHD AF CON UXN MEM/NORMAL | 69 | 0xfffffbfffdb80000-0xfffffbfffdb90000 64K PTE ro x SHD AF UXN MEM/NORMAL | 70 | 0xfffffbfffdb90000-0xfffffbfffdba0000 64K PTE ro NX SHD AF UXN MEM/NORMAL | 82 | 0xfffffc0002000000-0xfffffc0002200000 2M PTE RW NX SHD AF UXN MEM/NORMAL | 90 0xfff0000001c00000-0xfff0000080000000 2020M PTE RW NX SHD AF UXN MEM/NORMAL-TAGGED 92 0xfff0000800000000-0xfff0000800700000 7M PTE RW NX SHD AF UXN MEM/NORMAL-TAGGED 93 0xfff0000800700000-0xfff0000800710000 64K PTE ro NX SHD AF UXN MEM/NORMAL-TAGGED [all …]
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/openbmc/linux/Documentation/hwmon/ |
H A D | smpro-hwmon.rst | 60 temp5_crit millicelsius RO MEM HOT Threshold for all DIMMs 62 temp6_crit millicelsius RO MEM HOT Threshold for all DIMMs 64 temp7_crit millicelsius RO MEM HOT Threshold for all DIMMs 66 temp8_crit millicelsius RO MEM HOT Threshold for all DIMMs 68 temp9_crit millicelsius RO MEM HOT Threshold for all DIMMs 70 temp10_crit millicelsius RO MEM HOT Threshold for all DIMMs 72 temp11_crit millicelsius RO MEM HOT Threshold for all DIMMs 74 temp12_crit millicelsius RO MEM HOT Threshold for all DIMMs
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/openbmc/linux/drivers/pci/hotplug/ |
H A D | ibmphp_res.c | 92 case MEM: in alloc_bus_range() 122 case MEM: in alloc_bus_range() 206 rc = alloc_bus_range(&newbus, &newrange, curr, MEM, 1); in ibmphp_rsrc_init() 215 rc = alloc_bus_range(&bus_cur, &newrange, curr, MEM, 0); in ibmphp_rsrc_init() 220 rc = alloc_bus_range(&newbus, &newrange, curr, MEM, 1); in ibmphp_rsrc_init() 289 new_mem->type = MEM; in ibmphp_rsrc_init() 376 case MEM: in add_bus_range() 401 case MEM: in add_bus_range() 449 case MEM: in update_resources() 494 case MEM: in fix_me() [all …]
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-xp-mv78460.dtsi | 92 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 94 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 96 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ 98 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 101 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ 103 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */ 105 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */ 107 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */ 110 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ 113 0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
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H A D | armada-xp-mv78260.dtsi | 74 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 76 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 78 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ 80 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 83 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ 85 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */ 87 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */ 89 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */ 92 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
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H A D | armada-xp-mv78230.dtsi | 69 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 71 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 73 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ 75 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 77 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
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H A D | armada-385.dtsi | 52 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */ 54 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */ 56 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */ 58 0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
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H A D | armada-380.dtsi | 53 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */ 55 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */ 57 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
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H A D | kirkwood-6282.dtsi | 18 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 20 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
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/openbmc/u-boot/board/freescale/mpc8641hpcn/ |
H A D | README | 122 0x8000_0000 0x9fff_ffff RIO MEM 512M 123 0x8000_0000 0x9fff_ffff PCI1/PEX1 MEM 512M 124 0xa000_0000 0xbfff_ffff PCI2/PEX2 MEM 512M 137 and mappings. Note that with the exception of PCI MEM and RIO, the low 143 0xc_0000_0000 0xc_1fff_ffff RIO MEM 512M 144 0xc_0000_0000 0xc_1fff_ffff PCI1/PEX1 MEM 512M 145 0xc_2000_0000 0xc_3fff_ffff PCI2/PEX2 MEM 512M
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | renesas,rsnd.txt | 39 Playback: [MEM] -> [SRC2] -> [DVC0] -> [SSIU0/SSI0] -> [codec] 40 Capture: [MEM] <- [DVC1] <- [SRC3] <- [SSIU1/SSI1] <- [codec] 148 [MEM] -> [SRC1] -> [CTU02] -+-> [MIX0] -> [DVC0] -> [SSI0] 150 [MEM] -> [SRC2] -> [CTU03] -+ 200 [MEM] -> [SSIU 30] -+-> [SSIU 3] --> [Codec] 202 [MEM] -> [SSIU 31] -+ 204 [MEM] -> [SSIU 32] -+ 206 [MEM] -> [SSIU 33] -+
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/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | mvebu-pci.txt | 113 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 115 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 117 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ 119 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 122 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ 124 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */ 126 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */ 128 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */ 131 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ 134 0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
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/openbmc/u-boot/arch/arm/dts/ |
H A D | armada-xp-mv78460.dtsi | 129 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 131 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 133 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ 135 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 138 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ 140 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */ 142 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */ 144 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */ 147 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ 150 0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
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H A D | armada-xp-mv78260.dtsi | 111 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 113 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 115 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ 117 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 120 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ 122 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */ 124 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */ 126 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */ 129 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
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H A D | armada-385.dtsi | 52 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */ 54 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */ 56 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */ 58 0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
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H A D | armada-380.dtsi | 53 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */ 55 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */ 57 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
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H A D | armada-xp-mv78230.dtsi | 106 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 108 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 110 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ 112 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 114 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
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/openbmc/qemu/disas/ |
H A D | alpha.c | 590 #define MEM(oo) MEM_(oo), MEM_MASK macro 723 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */ 724 { "lda", MEM(0x08), BASE, ARG_MEM }, 725 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */ 726 { "ldah", MEM(0x09), BASE, ARG_MEM }, 727 { "ldbu", MEM(0x0A), BWX, ARG_MEM }, 730 { "ldq_u", MEM(0x0B), BASE, ARG_MEM }, 731 { "ldwu", MEM(0x0C), BWX, ARG_MEM }, 732 { "stw", MEM(0x0D), BWX, ARG_MEM }, 733 { "stb", MEM(0x0E), BWX, ARG_MEM }, [all …]
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/openbmc/linux/arch/powerpc/boot/dts/ |
H A D | turris1x.dts | 479 * P2020 PCIe Root Port does not use PCIe MEM and xHCI controller 480 * uses 64kB + 8kB of PCIe MEM. No PCIe IO is used or required. 481 * So allocate 128kB of PCIe MEM for this PCIe bus. 484 ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00020000>, /* MEM */ 495 ranges = <0x02000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>, /* MEM */ 511 ranges = <0x02000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>, /* MEM */
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/openbmc/u-boot/board/freescale/mpc837xerdb/ |
H A D | README | 41 0x8000_0000 0x8fff_ffff PCI MEM prefetch 256M 32 42 0x9000_0000 0x9fff_ffff PCI MEM non-prefetch 256M 32
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/openbmc/u-boot/lib/zlib/ |
H A D | inflate.h | 49 MEM, /* got an inflate() memory error -- remain here until reset */ enumerator
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/openbmc/linux/lib/zlib_inflate/ |
H A D | inflate.h | 46 MEM, /* got an inflate() memory error -- remain here until reset */ enumerator
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