1*060c85d4SChris Packham// SPDX-License-Identifier: GPL-2.0 2*060c85d4SChris Packham/ { 3*060c85d4SChris Packham mbus@f1000000 { 4*060c85d4SChris Packham pciec: pcie@82000000 { 5*060c85d4SChris Packham compatible = "marvell,kirkwood-pcie"; 6*060c85d4SChris Packham status = "disabled"; 7*060c85d4SChris Packham device_type = "pci"; 8*060c85d4SChris Packham 9*060c85d4SChris Packham #address-cells = <3>; 10*060c85d4SChris Packham #size-cells = <2>; 11*060c85d4SChris Packham 12*060c85d4SChris Packham bus-range = <0x00 0xff>; 13*060c85d4SChris Packham 14*060c85d4SChris Packham ranges = 15*060c85d4SChris Packham <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 16*060c85d4SChris Packham 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 17*060c85d4SChris Packham 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; 18*060c85d4SChris Packham 19*060c85d4SChris Packham pcie0: pcie@1,0 { 20*060c85d4SChris Packham device_type = "pci"; 21*060c85d4SChris Packham assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; 22*060c85d4SChris Packham reg = <0x0800 0 0 0 0>; 23*060c85d4SChris Packham #address-cells = <3>; 24*060c85d4SChris Packham #size-cells = <2>; 25*060c85d4SChris Packham #interrupt-cells = <1>; 26*060c85d4SChris Packham ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 27*060c85d4SChris Packham 0x81000000 0 0 0x81000000 0x1 0 1 0>; 28*060c85d4SChris Packham bus-range = <0x00 0xff>; 29*060c85d4SChris Packham interrupt-map-mask = <0 0 0 0>; 30*060c85d4SChris Packham interrupt-map = <0 0 0 0 &intc 9>; 31*060c85d4SChris Packham marvell,pcie-port = <0>; 32*060c85d4SChris Packham marvell,pcie-lane = <0>; 33*060c85d4SChris Packham clocks = <&gate_clk 2>; 34*060c85d4SChris Packham status = "disabled"; 35*060c85d4SChris Packham }; 36*060c85d4SChris Packham }; 37*060c85d4SChris Packham }; 38*060c85d4SChris Packham 39*060c85d4SChris Packham ocp@f1000000 { 40*060c85d4SChris Packham pinctrl: pin-controller@10000 { 41*060c85d4SChris Packham compatible = "marvell,98dx4122-pinctrl"; 42*060c85d4SChris Packham 43*060c85d4SChris Packham }; 44*060c85d4SChris Packham }; 45*060c85d4SChris Packham}; 46*060c85d4SChris Packham 47*060c85d4SChris Packham&sata_phy0 { 48*060c85d4SChris Packham status = "disabled"; 49*060c85d4SChris Packham}; 50*060c85d4SChris Packham 51*060c85d4SChris Packham&sata_phy1 { 52*060c85d4SChris Packham status = "disabled"; 53*060c85d4SChris Packham}; 54