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Searched refs:MDCNFG_DRI (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1398 #define MDCNFG_DRI Fld (15, 17) /* min. DRAM Refresh Interval/4 */ macro
1402 ((Tcpu)/8 << FShft (MDCNFG_DRI))
/openbmc/u-boot/include/
H A DSA-1100.h1863 #define MDCNFG_DRI Fld (15, 17) /* min. DRAM Refresh Interval/4 */ macro
1867 ((Tcpu)/8 << FShft (MDCNFG_DRI))