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Searched refs:MDCNFG_DE0 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/arm/mach-pxa/
H A Dpxa2xx.c45 if (mdcnfg & (MDCNFG_DE0 | MDCNFG_DE1)) in pxa2xx_smemc_get_sdram_rows()
H A Dsmemc.h52 #define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */ macro
/openbmc/u-boot/arch/arm/cpu/pxa/
H A Dpxa2xx.c138 ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG); in pxa2xx_dram_init()
158 (MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3); in pxa2xx_dram_init()
/openbmc/linux/arch/arm/mach-sa1100/
H A Dsleep.S104 bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1376 #define MDCNFG_DE0 MDCNFG_DE (0) /* DRAM Enable bank 0 */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h2444 #define MDCNFG_DE0 0x00000001 macro
/openbmc/u-boot/include/
H A DSA-1100.h1841 #define MDCNFG_DE0 MDCNFG_DE (0) /* DRAM Enable bank 0 */ macro