| /openbmc/u-boot/doc/ |
| H A D | README.bitbangMII | 21 MDC_DECLARE - Declaration needed to access to the MDC pin (optional)
22 MDC(v) - Write v on the MDC pin
41 int (*set_mdc)() - Write the MDC pin
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| /openbmc/linux/Documentation/devicetree/bindings/dma/ |
| H A D | img-mdc-dma.txt | 1 * IMG Multi-threaded DMA Controller (MDC)
5 - reg: Must contain the base address and length of the MDC registers.
10 - sys: MDC system interface clock.
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | kmeter1.dts | 149 0 2 1 0 1 0 /* MDC */
175 0 2 1 0 1 0 /* MDC */
201 0 2 1 0 1 0 /* MDC */
221 0 2 1 0 1 0 /* MDC */
239 0 2 1 0 1 0 /* MDC */
257 0 2 1 0 1 0 /* MDC */
275 0 2 1 0 1 0 /* MDC */
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| /openbmc/u-boot/board/freescale/b4860qds/ |
| H A D | b4_pbi.cfg | 25 #slowing down the MDC clock to make it <= 2.5 MHZ
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| /openbmc/u-boot/board/freescale/t208xqds/ |
| H A D | t208x_pbi.cfg | 32 #Errata for slowing down the MDC clock to make it <= 2.5 MHZ
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| /openbmc/u-boot/board/freescale/t208xrdb/ |
| H A D | t2080_pbi.cfg | 32 #Errata for slowing down the MDC clock to make it <= 2.5 MHZ
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| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp151a-prtt1l.dtsi | 40 /* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
41 * stmmac MDC clock without reducing system bus rate, we need to use
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | armada-38x-controlcenterdc.dts | 262 gpios = < /*MDC*/ &gpio0 13 0
366 gpios = < /*MDC*/ &gpio0 25 0
470 gpios = < /*MDC*/ &gpio1 14 0
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| H A D | armada-8040-db.dts | 98 * [32,34] GE_MDIO/MDC
203 * [27,31] GE_MDIO/MDC
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| /openbmc/linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini-sq201.dts | 58 /* Uses MDC and MDIO */
59 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| H A D | gemini-sl93512r.dts | 73 /* Uses MDC and MDIO */
74 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| H A D | gemini-ns2502.dts | 34 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| H A D | gemini-ssi1328.dts | 34 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| H A D | gemini-dlink-dns-313.dts | 154 /* Uses MDC and MDIO */
155 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| H A D | gemini-rut1xx.dts | 61 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| H A D | gemini-wbd111.dts | 73 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| H A D | gemini-wbd222.dts | 72 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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| /openbmc/linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm47094-asus-rt-ac88u.dts | 21 /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */
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| /openbmc/u-boot/include/configs/ |
| H A D | MPC8560ADS.h | 308 #define MDC(bit) if(bit) iop->pdat |= 0x00200000; \ macro
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| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | am335x-netcan-plus-1xx.dts | 92 "MDC",
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| H A D | am335x-baltos-ir2110.dts | 88 "MDC",
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| H A D | am335x-netcom-plus-2xx.dts | 100 "MDC",
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| /openbmc/linux/drivers/net/ethernet/sis/ |
| H A D | sis900.c | 874 sw32(mear, MDIO | MDDIR | MDC); in mdio_idle()
886 sw32(mear, MDDIR | MDIO | MDC); in mdio_reset()
918 sw32(mear, dataval | MDC); in mdio_read()
927 sw32(mear, MDC); in mdio_read()
964 sw8(mear, dataval | MDC); in mdio_write()
975 sw32(mear, dataval | MDC); in mdio_write()
984 sw8(mear, MDC); in mdio_write()
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| H A D | sis900.h | 61 MDC = 0x00000040, MDDIR = 0x00000020, MDIO = 0x00000010, /* 7016 specific */ enumerator
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| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | lan966x-pcb8290.dts | 30 /* MDC, MDIO */
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