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Searched refs:MCFSIM_ICR_LEVEL4 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/m68k/include/asm/
H A Dmcfintc.h36 #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */ macro
/openbmc/u-boot/arch/m68k/include/asm/
H A Dm5307.h58 #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */ macro
H A Dm5249.h130 #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */ macro
/openbmc/linux/arch/m68k/coldfire/
H A Dm525x.c52 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m525x_qspi_init()
H A Dm5249.c78 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m5249_qspi_init()