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Searched refs:MCFSIM_ICR_AUTOVEC (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/arch/m68k/coldfire/
H A Dtimers.c55 #ifdef MCFSIM_ICR_AUTOVEC in init_timer_irq()
57 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, in init_timer_irq()
63 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, in init_timer_irq()
H A Dm525x.c52 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m525x_qspi_init()
64 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m525x_i2c_init()
H A Dm5249.c78 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, in m5249_qspi_init()
92 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5249_i2c_init()
H A Dm5407.c43 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5407_i2c_init()
H A Dm5206.c43 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5206_i2c_init()
H A Dm5307.c52 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5307_i2c_init()
/openbmc/linux/arch/m68k/include/asm/
H A Dmcfintc.h31 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */ macro
/openbmc/u-boot/arch/m68k/include/asm/
H A Dimmap.h121 #define CONFIG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3)
144 #define CONFIG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL3 | MCFSIM_ICR_PRI3)
260 #define CONFIG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | \
H A Dm5307.h53 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */ macro
H A Dm5249.h125 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */ macro