Searched refs:MAX_MPCC (Results 1 – 10 of 10) sorted by relevance
192 uint32_t MPCC_GAMUT_REMAP_MODE[MAX_MPCC]; \234 uint32_t MPCC_OGAM_RAMA_OFFSET_B[MAX_MPCC]; \235 uint32_t MPCC_OGAM_RAMA_OFFSET_G[MAX_MPCC]; \236 uint32_t MPCC_OGAM_RAMA_OFFSET_R[MAX_MPCC]; \275 uint32_t MPCC_OGAM_CONTROL[MAX_MPCC]; \276 uint32_t MPCC_OGAM_LUT_CONTROL[MAX_MPCC]; \342 uint32_t MPCC_MCM_3DLUT_MODE[MAX_MPCC]; \343 uint32_t MPCC_MCM_3DLUT_INDEX[MAX_MPCC]; \344 uint32_t MPCC_MCM_3DLUT_DATA[MAX_MPCC]; \351 uint32_t MPCC_MCM_1DLUT_CONTROL[MAX_MPCC]; \[all …]
1458 for (i = 0; i < MAX_MPCC; i++) in dcn30_mpc_construct()
89 uint32_t MPCC_TOP_GAIN[MAX_MPCC]; \90 uint32_t MPCC_BOT_GAIN_INSIDE[MAX_MPCC]; \91 uint32_t MPCC_BOT_GAIN_OUTSIDE[MAX_MPCC]; \98 uint32_t MPCC_OGAM_RAMA_END_CNTL1_B[MAX_MPCC]; \104 uint32_t MPCC_OGAM_RAMA_REGION_0_1[MAX_MPCC]; \118 uint32_t MPCC_OGAM_RAMB_REGION_0_1[MAX_MPCC]; \120 uint32_t MPCC_MEM_PWR_CTRL[MAX_MPCC];\121 uint32_t MPCC_OGAM_LUT_INDEX[MAX_MPCC];\122 uint32_t MPCC_OGAM_LUT_RAM_CONTROL[MAX_MPCC];\123 uint32_t MPCC_OGAM_LUT_DATA[MAX_MPCC];\[all …]
587 for (i = 0; i < MAX_MPCC; i++) in dcn20_mpc_construct()
50 uint32_t MPCC_TOP_SEL[MAX_MPCC]; \51 uint32_t MPCC_BOT_SEL[MAX_MPCC]; \52 uint32_t MPCC_CONTROL[MAX_MPCC]; \53 uint32_t MPCC_STATUS[MAX_MPCC]; \54 uint32_t MPCC_OPP_ID[MAX_MPCC]; \55 uint32_t MPCC_BG_G_Y[MAX_MPCC]; \56 uint32_t MPCC_BG_R_CR[MAX_MPCC]; \57 uint32_t MPCC_BG_B_CB[MAX_MPCC]; \58 uint32_t MPCC_SM_CONTROL[MAX_MPCC]; \60 uint32_t MPCC_UPDATE_LOCK_SEL[MAX_MPCC]; \
534 for (i = 0; i < MAX_MPCC; i++) in dcn10_mpc_construct()
42 #define MAX_MPCC 6 macro181 struct mpcc mpcc_array[MAX_MPCC];
123 for (i = 0; i < MAX_MPCC; i++) in dcn201_mpc_construct()
1042 for (i = 0; i < MAX_MPCC; i++) in dcn32_mpc_construct()
2667 if (s.dpp_id < MAX_MPCC) in acquire_resource_from_hw_enabled_state()2671 if (s.bot_mpcc_id < MAX_MPCC) in acquire_resource_from_hw_enabled_state()