| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr_vbios_smu.c | 33 #define MAX_INSTANCE 5 macro
41 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_smu.c | 34 #define MAX_INSTANCE 7 macro
42 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | dcn316_clk_mgr.c | 45 #define MAX_INSTANCE 7 macro
53 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_smu.c | 33 #define MAX_INSTANCE 6 macro
42 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | dimgrey_cavefish_reg_init.c | 34 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in dimgrey_cavefish_reg_base_init()
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| H A D | aldebaran_reg_init.c | 33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in aldebaran_reg_base_init()
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| H A D | arct_reg_init.c | 33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in arct_reg_base_init()
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| H A D | vega10_reg_init.c | 33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in vega10_reg_base_init()
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| H A D | vega20_reg_init.c | 33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in vega20_reg_base_init()
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| /openbmc/linux/drivers/gpu/drm/amd/include/ |
| H A D | cyan_skillfish_ip_offset.h | 24 #define MAX_INSTANCE 6 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | navi10_ip_offset.h | 24 #define MAX_INSTANCE 6 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | navi12_ip_offset.h | 24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | dimgrey_cavefish_ip_offset.h | 24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | vega20_ip_offset.h | 24 #define MAX_INSTANCE 6 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | navi14_ip_offset.h | 24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | sienna_cichlid_ip_offset.h | 24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | beige_goby_ip_offset.h | 25 #define MAX_INSTANCE 7 macro
36 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | vega10_ip_offset.h | 24 #define MAX_INSTANCE 5 macro
34 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | renoir_ip_offset.h | 24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | vangogh_ip_offset.h | 27 #define MAX_INSTANCE 8 macro
38 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | yellow_carp_offset.h | 6 #define MAX_INSTANCE 7 macro
15 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| H A D | arct_ip_offset.h | 24 #define MAX_INSTANCE 8 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
|
| H A D | aldebaran_ip_offset.h | 24 #define MAX_INSTANCE 7 macro
32 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 61 #define MAX_INSTANCE 7 macro
69 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_resource.c | 111 #define MAX_INSTANCE 7 macro
|