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Searched refs:MAS0_WQ_CLR_RSRV (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/nohash/
H A Dmmu-e500.h56 #define MAS0_WQ_CLR_RSRV 0x00002000 macro
/openbmc/qemu/target/ppc/
H A Dmmu_helper.c1039 case MAS0_WQ_CLR_RSRV: in helper_booke206_tlbwe()
H A Dcpu.h936 #define MAS0_WQ_CLR_RSRV (2 << MAS0_WQ_SHIFT) macro