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Searched refs:M5 (Results 1 – 13 of 13) sorted by relevance

/openbmc/u-boot/arch/arm/dts/
H A Dsun7i-a20-m5.dts5 * Minimal dts file for the Mele M5 for u-boot only
12 model = "Mele M5";
/openbmc/phosphor-webui/app/assets/icons/
H A Dicon-replace.svg1 <svg xmlns="http://www.w3.org/2000/svg"><path fill-rule="nonzero" transform="translate(7,3)" d="M5.…
/openbmc/u-boot/board/ti/dra7xx/
H A Dmux_data.h189 {XREF_CLK1, (M5 | PIN_OUTPUT)}, /* xref_clk1.atl_clk1 */
190 {XREF_CLK2, (M5 | PIN_OUTPUT)}, /* xref_clk2.atl_clk2 */
219 {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */
319 {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */
641 {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */
829 {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */
/openbmc/u-boot/arch/arm/include/asm/arch-omap5/
H A Dmux_omap5.h44 #define M5 5 macro
H A Dmux_dra7xx.h34 #define M5 5 macro
/openbmc/u-boot/arch/x86/include/asm/arch-braswell/
H A Dgpio.h19 M5, enumerator
/openbmc/u-boot/arch/arm/include/asm/arch-omap4/
H A Dmux_omap4.h52 #define M5 5 macro
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Dmux.h46 #define M5 5 macro
/openbmc/u-boot/board/intel/cherryhill/
H A Dcherryhill.c65 GPIO_PAD_CONF("N00: GPIO_DFX0", NATIVE, M5, NA, NA, NA,
68 GPIO_PAD_CONF("N03: GPIO_DFX1", NATIVE, M5, NA, NA, NA,
71 GPIO_PAD_CONF("N07: GPIO_DFX2", NATIVE, M5, NA, NA, NA,
74 GPIO_PAD_CONF("N01: GPIO_DFX3", NATIVE, M5, NA, NA, NA,
/openbmc/u-boot/board/freescale/lx2160a/
H A DREADME170 |Mezzanine:X-M5-SATA (29687)
/openbmc/u-boot/board/sunxi/
H A DMAINTAINERS272 MELE M5 BOARD
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/anthy/anthy/
H A D2ch_t.patch1868 +�� #M5 ��
/openbmc/u-boot/
H A DREADME1242 Optrex CBL50840-2 NF-FW 99 22 M5