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Searched refs:IS_DISPLAY_VER (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_device.h59 #define HAS_LSPCON(i915) (IS_DISPLAY_VER(i915, 9, 10))
H A Dintel_display_debugfs.c754 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { in i915_lpsp_status()
756 } else if (IS_DISPLAY_VER(i915, 11, 12)) { in i915_lpsp_status()
1176 else if (IS_DISPLAY_VER(i915, 9, 10)) in i915_lpsp_capability_show()
H A Dintel_modeset_setup.c909 if (IS_DISPLAY_VER(i915, 10, 12)) in intel_early_display_was()
H A Dintel_display_device.c997 if (IS_DISPLAY_VER(i915, 10, 12) && in intel_display_device_info_runtime_init()
H A Dintel_crt.c372 else if (IS_DISPLAY_VER(dev_priv, 3, 4)) in intel_crt_mode_valid()
H A Dintel_psr.c1366 IS_DISPLAY_VER(dev_priv, 11, 13)) in wm_optimization_wa()
1423 if (IS_DISPLAY_VER(dev_priv, 9, 10)) in intel_psr_enable_source()
H A Dintel_fbc.c1102 if ((IS_DISPLAY_VER(i915, 12, 13) || in intel_fbc_check_plane()
H A Dintel_display_irq.c1710 if (IS_DISPLAY_VER(dev_priv, 11, 13)) { in gen8_de_irq_postinstall()
H A Dintel_fb.c393 if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until)) in plane_has_modifier()
H A Dskl_universal_plane.c2290 plane->need_async_flip_disable_wa = IS_DISPLAY_VER(dev_priv, in skl_universal_plane_create()
H A Dintel_display.c1754 else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11, 12)) in intel_phy_is_combo()
2458 return IS_DISPLAY_VER(dev_priv, 5, 7) || IS_CHERRYVIEW(dev_priv); in intel_cpu_transcoder_has_m2_n2()
7552 } else if (IS_DISPLAY_VER(dev_priv, 3, 4)) { in intel_setup_outputs()
H A Dintel_ddi.c571 if (IS_DISPLAY_VER(dev_priv, 8, 10) && in intel_ddi_transcoder_func_reg_val_get()
646 if (IS_DISPLAY_VER(dev_priv, 8, 10)) in intel_ddi_disable_transcoder_func()
H A Dintel_hdmi.c526 if (IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr && type == DP_SDP_VSC) in hsw_write_infoframe()
H A Dintel_bios.c1207 if (!IS_DISPLAY_VER(i915, 3, 7)) { in parse_sdvo_device_mapping()
/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_drv.h440 #define IS_DISPLAY_VER(i915, from, until) \ macro